Epson S1D13708 Benutzerhandbuch

Page 9

Vancouver Design Center

13708CFG Configuration Program

S1D13708

Issue Date: 01/11/16 

X39A-B-001-01

The Clocks tab simplifies the selection of input clock frequencies and the sources of 
internal clocking signals. For further information regarding clocking and clock sources, 
refer to the S1D13708 Hardware Functional Specification, document number X39A-A-
001-xx.

It is the responsibility of the system designer to ensure that the correct clock frequencies 
are supplied to the S1D13708.

Changing clock values may modify or invalidate Panel settings. Confirm all settings on 
the Panel tab after modifying any clock settings.

CLKI

CLKI2

BCLK Source

XTAL Timing

PWMCLK

PWMCLK Source

PCLK Source

PCLK Divide

MCLK Source

MCLK Divide

PWMCLK

PWMCLK Enable

PWMCLK Divide

Force High

Duty Cycle

CV Pulse

CV Pulse

CV Pulse Enable

CV Pulse Divide

Force High

Burst Length

BCLK Divide