Texas Instruments TMS320C6747 DSP Benutzerhandbuch
3.15 HC Frame Remaining Register (HCFMREMAINING)
3.16 HC Frame Number Register (HCFMNUMBER)
Registers
www.ti.com
The HC frame remaining register (HCFMREMAINING) reports the number of full-speed bit times
remaining in the current frame. HCFMREMAINING is shown in
remaining in the current frame. HCFMREMAINING is shown in
and described in
Figure 16. HC Frame Remaining Register (HCFMREMAINING)
31
30
16
FRT
Reserved
R-0
R-0
15
14
13
0
Reserved
FR
R-0
R-0
LEGEND: R = Read only; -n = value after reset
Table 16. HC Frame Remaining Register (HCFMREMAINING) Field Descriptions
Bit
Field
Value
Description
31
FRT
0-1
Frame remaining toggle. This bit is loaded with the frame interval toggle bit every time the USB
host controller loads the frame interval field into the frame remaining field.
host controller loads the frame interval field into the frame remaining field.
30-14
Reserved
0
Reserved
13-0
FR
0-3FFFh
Frame remaining. The number of full-speed bit times remaining in the current frame. This field is
automatically reloaded with the frame interval (FI) value in the HC frame interval register
(HCFMINTERVAL) at the beginning of every frame.
automatically reloaded with the frame interval (FI) value in the HC frame interval register
(HCFMINTERVAL) at the beginning of every frame.
The HC frame number register (HCFMNUMBER) reports the current USB frame number. HCFMNUMBER
is shown in
is shown in
and described in
Figure 17. HC Frame Number Register (HCFMNUMBER)
31
16
Reserved
R-0
15
0
FN
R-0
LEGEND: R = Read only; -n = value after reset
Table 17. HC Frame Number Register (HCFMNUMBER) Field Descriptions
Bit
Field
Value
Description
31-16
Reserved
0
Reserved
15-0
FN
0-FFFFh
Frame number. This field reports the current USB frame number. It is incremented when the frame
remaining field is reloaded with the frame interval (FI) value in the HC frame interval register
(HCFMINTERVAL). Frame number automatically rolls over from FFFFh to 0. After frame number is
incremented, its new value is written to the HCCA and the USB host controller sets the SOF
interrupt status bit and begins processing the ED lists.
remaining field is reloaded with the frame interval (FI) value in the HC frame interval register
(HCFMINTERVAL). Frame number automatically rolls over from FFFFh to 0. After frame number is
incremented, its new value is written to the HCCA and the USB host controller sets the SOF
interrupt status bit and begins processing the ED lists.
Universal Serial Bus OHCI Host Controller
24
SPRUFM8 – September 2008