Texas Instruments TMS320C6747 DSP Benutzerhandbuch
3.17 HC Periodic Start Register (HCPERIODICSTART)
www.ti.com
Registers
The HC periodic start register (HCPERIODICSTART) defines the position within the USB frame where
endpoint descriptors (EDs) on the periodic list have priority over EDs on the bulk and control lists.
HCPERIODICSTART is shown in
endpoint descriptors (EDs) on the periodic list have priority over EDs on the bulk and control lists.
HCPERIODICSTART is shown in
and described in
Figure 18. HC Periodic Start Register (HCPERIODICSTART)
31
16
Reserved
R-0
15
14
13
0
Reserved
PS
R-0
R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 18. HC Periodic Start Register (HCPERIODICSTART) Field Descriptions
Bit
Field
Value
Description
31-14
Reserved
0
Reserved
13-0
PS
0-3FFFh
Periodic start. The host controller driver must program this value to be about 10% less than the
frame interval (FI) value in the HC frame interval register (HCFMINTERVAL), so that control and
bulk EDs have priority for the first 10% of the frame; then periodic EDs have priority for the
remaining 90% of the frame.
frame interval (FI) value in the HC frame interval register (HCFMINTERVAL), so that control and
bulk EDs have priority for the first 10% of the frame; then periodic EDs have priority for the
remaining 90% of the frame.
SPRUFM8 – September 2008
Universal Serial Bus OHCI Host Controller
25