Acer Intel Celeron G530 KC.53001.CDG Benutzerhandbuch
Produktcode
KC.53001.CDG
44
Intel
®
Celeron
®
Processor on 0.13 Micron Process in the 478-Pin Package
Datasheet
System Bus Signal Quality Specifications
Figure 24. Low-to-High System Bus Receiver Ringback Tolerance for PWRGOOD
and TAP Buffers
0.5 * Vcc
Vt+ (min)
Vt+ (max)
Vt- (max)
Vcc
Allowable Ringback
Vss
Threshold Region to switch
receiver to a logic 1.
Figure 25. High-to-Low System Bus Receiver Ringback Tolerance for PWRGOOD
and TAP Buffers
0.5 * Vcc
Vt+ (min)
Vt- (max)
Vcc
Vss
Vt- (min)
Threshold Region to switch
receiver to a logic 0.
Allowable Ringback