Texas Instruments TMS320C6472 Evaluation Module TMDSEVM6472LE TMDSEVM6472LE Datenbogen
Produktcode
TMDSEVM6472LE
PRODUCTPREVIEW
SPRS612G
–
JUNE 2009
–
REVISED JULY 2011
Table 7-1. Timing Requirements for Power-Supply Sequence (Option 1)
(1)
500/625/700
NO.
UNIT
MIN
MAX
1
t
su(DVDD33-CVDD)
Setup time, DV
DD33
supply stable before CV
DD
supply stable
0.5
200
ms
Setup time, CV
DD
supply stable before DV
DD18
supply and V
REFSSTL
2
t
su(CVDD-DVDD18)
0
200
ms
reference voltage stable
Setup time, DV
DD18
supply and V
REFSSTL
reference voltage stable before
3
t
su(DVDD18-DVDD15)
0
200
ms
DV
DD15
supply and V
REFHSTL
reference voltage stable
Setup time, DV
DD15
supply and V
REFHSTL
reference voltage stable before
4
t
su(DVDD15-DVDD)
0
200
ms
DV
DD
supply stable
(1)
Note: The word stable means voltages that have reached a valid level as described in .
Table 7-2. Timing Requirements for Power-Supply Sequence (Option 2)
(1)
500/625/700
NO.
UNIT
MIN
MAX
1
t
su(DVDD33-CVDD)
Setup time, DV
DD33
supply stable before CV
DD
supply stable
0.5
200
ms
2
t
su(CVDD-ALLSUP)
Setup time, CV
DD
supply stable before all other supplies stable
0
200
ms
(1)
Note: The word stable means voltages that have reached a valid level as described in .
For detailed information, see the TMS320C6472/TMS320TCI6486 Hardware Design Guide (literature
number
number
7.3.2
Power-Supply Decoupling
In order to properly decouple the supply planes from system noise, place as many capacitors (caps) as
possible close to the DSP. These caps need to be close to the DSP, no more than 1.25 cm maximum
distance to be effective. Physically smaller caps are better, such as 0402, but need to be evaluated from a
yield/manufacturing point-of-view. Parasitic inductance limits the effectiveness of the decoupling
capacitors, therefore physically smaller capacitors should be used while maintaining the largest available
capacitance value. As with the selection of any component, verification of capacitor availability over the
product's production lifetime should be considered.
possible close to the DSP. These caps need to be close to the DSP, no more than 1.25 cm maximum
distance to be effective. Physically smaller caps are better, such as 0402, but need to be evaluated from a
yield/manufacturing point-of-view. Parasitic inductance limits the effectiveness of the decoupling
capacitors, therefore physically smaller capacitors should be used while maintaining the largest available
capacitance value. As with the selection of any component, verification of capacitor availability over the
product's production lifetime should be considered.
7.3.3
Preserving Boundary-Scan Functionality on DDR2, RGMII, and RapidIO Interface Pins
When the DDR2 Memory Controller is not used, the DV
DD18
, DV
DD18MON
, V
REFSSTL
, AV
DDA3
, AV
DDA4
,
CV
DD1
, PTV18P, and PTV18N pins can be NC or connected directly to ground (V
SS
) to save power.
However, this prevents boundary scan from functioning on the DDR2 Memory Controller pins. To preserve
boundary-scan functionality on the DDR2 Memory Controller pins DV
boundary-scan functionality on the DDR2 Memory Controller pins DV
DD18
, DV
DD18MON
, V
REFSSTL
, AV
DDA3
,
AV
DDA4
, CV
DD1
, PTV18P, and PTV18N should be connected as follows:
•
DV
DD18
, DV
DD18MON
, AV
DDA3
, and AV
DDA4
- connect these pins to the 1.8-V supply.
•
CV
DD1
- connect these pins to the 1.2-V supply.
•
V
REFSSTL
- connect this pin to a voltage of 0.9 V. This voltage can be generated directly from the 1.8-V
supply using two 1-k
Ω
resistors to form a resistor-divider circuit.
•
PTV18P - connect this pin to ground (V
SS
) via a 200-
Ω
resistor.
•
PTV18N - connect this pin to the 1.8-V supply via a 200-
Ω
resistor.
When the RGMII mode of the EMAC is not used, the DV
DD15
, DV
DD15MON
, V
REFHSTL
, PTV15P, and PTV15N
pins can be NC or connected directly to ground (V
SS
) to save power. However, this prevents boundary
scan from functioning on the RGMII pins of the EMAC. To preserve boundary-scan functionality on the
RGMII pins DV
RGMII pins DV
DD15
, DV
DD15MON
, V
REFHSTL
, PTV15P, and PTV15N should be connected as follows:
•
DV
DD15
and DV
DD15MON
- connect these pins to the 1.8-V supply.
•
V
REFHSTL
- connect to a voltage of 0.9 V. This voltage can be generated directly from the 1.8-V supply
using two 1-k
Ω
resistors to form a resistor-divider circuit.
•
PTV15P - connect this pin to ground (V
SS
) via a 200-
Ω
resistor.
120
C64x+ Peripheral Information and Electrical Specifications
Copyright
©
2009
–
2011, Texas Instruments Incorporated
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