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Texas Instruments FPD- Link LVDS to FPD-Link II Embedded Clock LVDS Converter DS99R421 Evaluation Kit FPDXSDUR-43USB/NOP FPDXSDUR-43USB/NOPB Datenbogen

Produktcode
FPDXSDUR-43USB/NOPB
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National Semiconductor Corporation 
 
Date: 5/12/2008 
Page 16 of 39 
Table 6. 
 
JP1, JP2: USB Red and Black wire  
Reference Description 
VDD  VSS  OPEN 
JP1 
Power wire in USB cable 
thru J2 (and J1 not 
mounted) connector 
Jumper RED to VSS – 
recommended 
 
Note: Normally VDD in USB application
 
Red wire tied 
to VDD 
 
 
 
Red wire 
tied to VSS 
(Default) 
 
 
Red wire 
floating 
(not 
recommended)
 
JP2 
Power wire in USB cable 
thru J2 (and J1 not 
mounted) connector 
Jumper BLACK to VSS – 
recommended 
 
Note: Normally VSS in USB application
 
Black wire 
tied to VDD 
 
 
 
Black wire 
tied to VSS 
(Default) 
 
 
Black wire 
floating 
(not 
recommended)
 
NO connect
J2
pin 1
pin 5
BLACK WIRE
mini USB
top side view
(mounted on component side)
RED WIRE
pin 4
pin 3
pin 2
_
+
 
 
 
The following picture depicts a typical example of the FPD-Link II serial stream.  This 
snapshot was taken with a differential probe across the 100 ohm termination resistor R1 
on the DS90UR124 Rx evaluation board.  R1 is the termination resistor to the RxIN +/-.  
Note: The scope was triggered, with a separate probe, on TCLK, the input clock into the 
DS90UR241 Tx.  To view the serial stream correctly, do not trigger on the probe 
monitoring the serial stream.