Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Datenbogen
Produktcode
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
HMAC Key Processing Enable
This bit enables HMAC key processing on the 512-bit HMAC key loaded
into the SHA_IDIGEST_A through SHA_IDIGEST_H registers and the
SHA_ODIGEST_A through SHA_ODIGEST_H register block. Once
HMAC key processing is finished, this bit is automatically cleared and
the resulting Inner and Outer digest is available in the SHA_IDIGEST_x
and SHA_ODIGEST_x respectively.
into the SHA_IDIGEST_A through SHA_IDIGEST_H registers and the
SHA_ODIGEST_A through SHA_ODIGEST_H register block. Once
HMAC key processing is finished, this bit is automatically cleared and
the resulting Inner and Outer digest is available in the SHA_IDIGEST_x
and SHA_ODIGEST_x respectively.
After key processing is complete, regular hash processing begins until
the block length is exhausted.
the block length is exhausted.
Description
Value
No operation
0
Enable HMAC key processing. This bit is automatically cleared
once HMAC key processing is finished.
once HMAC key processing is finished.
1
0x00
RW
HMAC_KEY_PROC
5
Performs the padding, the Hash/HMAC will be 'closed' at the end of the
block, as per MD5/SHA-1/SHA-2 specification (that is, appropriate
padding is added), or no padding is done, allowing the hash to be
continued later. However, if the Hash/HMAC is not closed, then the
Block Length must be a multiple of 64 bytes to ensure correct operation.
Auto cleared internally when hash closed.
block, as per MD5/SHA-1/SHA-2 specification (that is, appropriate
padding is added), or no padding is done, allowing the hash to be
continued later. However, if the Hash/HMAC is not closed, then the
Block Length must be a multiple of 64 bytes to ensure correct operation.
Auto cleared internally when hash closed.
Description
Value
No padding, hash computation can be continued.
0
Last packet will be padded.
1
0
RW
CLOSE_HASH
4
The initial digest register will be overwritten with the algorithm constants
for the selected algorithm when hashing and the initial digest count
register will be reset to 0. This will start a normal hash operation. When
continuing an existing hash or when performing an HMAC operation,
this register must be set to 0 and the intermediate/inner digest or HMAC
key and digest count need to be written to the context input registers
prior to writing SHA_MODE. Auto cleared internally after first block
processed.
for the selected algorithm when hashing and the initial digest count
register will be reset to 0. This will start a normal hash operation. When
continuing an existing hash or when performing an HMAC operation,
this register must be set to 0 and the intermediate/inner digest or HMAC
key and digest count need to be written to the context input registers
prior to writing SHA_MODE. Auto cleared internally after first block
processed.
Description
Value
Use precalculated digest (from another operation)
0
Use constants of the selected algorithm
1
0
RW
ALGO_CONSTANT
3
Hash Algorithm
Description
Value
MD5
0x0
reserved
0x1
SHA-1
0x2
reserved
0x3
SHA-224
0x4
reserved
0x5
SHA-256
0x6
reserved
0x7
0x0
RW
ALGO
2:0
December 13, 2013
1088
Texas Instruments-Advance Information
SHA/MD5 Accelerator