Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Datenbogen
Produktcode
DK-TM4C129X
Register 20: SHA Data 0 Input (SHA_DATA_0_IN), offset 0x080
Register 21: SHA Data 1 Input (SHA_DATA_1_IN), offset 0x084
Register 22: SHA Data 2 Input (SHA_DATA_2_IN), offset 0x088
Register 23: SHA Data 3 Input (SHA_DATA_3_IN), offset 0x08C
Register 24: SHA Data 4 Input (SHA_DATA_4_IN), offset 0x090
Register 25: SHA Data 5 Input (SHA_DATA_5_IN), offset 0x094
Register 26: SHA Data 6 Input (SHA_DATA_6_IN), offset 0x098
Register 27: SHA Data 7 Input (SHA_DATA_7_IN), offset 0x09C
Register 28: SHA Data 8 Input (SHA_DATA_8_IN), offset 0x0A0
Register 29: SHA Data 9 Input (SHA_DATA_9_IN), offset 0x0A4
Register 30: SHA Data 10 Input (SHA_DATA_10_IN), offset 0x0A8
Register 31: SHA Data 11 Input (SHA_DATA_11_IN), offset 0x0AC
Register 32: SHA Data 12 Input (SHA_DATA_12_IN), offset 0x0B0
Register 33: SHA Data 13 Input (SHA_DATA_13_IN), offset 0x0B4
Register 34: SHA Data 14 Input (SHA_DATA_14_IN), offset 0x0B8
Register 35: SHA Data 15 Input (SHA_DATA_15_IN), offset 0x0BC
Data input message
Note:
The SHA_DATA_n_IN_0 register acts as a FIFO and shifts data into the other
SHA_DATA_n_IN registers.
SHA_DATA_n_IN registers.
SHA Data n Input (SHA_DATA_n_IN)
Base 0x4403.4000
Offset 0x080
Type RW, reset 0x0000.0000
Offset 0x080
Type RW, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
DATA_IN
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
DATA_IN
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Digest/Key Data
0x0000.0000
RW
DATA_IN
31:0
December 13, 2013
1090
Texas Instruments-Advance Information
SHA/MD5 Accelerator