Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Datenbogen
Produktcode
DK-TM4C129X
Register 1: QEI Control (QEICTL), offset 0x000
This register contains the configuration of the QEI module. Separate enables are provided for the
quadrature encoder and the velocity capture blocks; the quadrature encoder must be enabled in
order to capture the velocity, but the velocity does not need to be captured in applications that do
not need it. The phase signal interpretation, phase swap, Position Update mode, Position Reset
mode, and velocity predivider are all set via this register.
quadrature encoder and the velocity capture blocks; the quadrature encoder must be enabled in
order to capture the velocity, but the velocity does not need to be captured in applications that do
not need it. The phase signal interpretation, phase swap, Position Update mode, Position Reset
mode, and velocity predivider are all set via this register.
QEI Control (QEICTL)
QEI0 base: 0x4002.C000
Offset 0x000
Type RW, reset 0x0000.0000
Offset 0x000
Type RW, reset 0x0000.0000
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
FILTCNT
reserved
RW
RW
RW
RW
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
ENABLE
SWAP
SIGMODE
CAPMODE
RESMODE
VELEN
VELDIV
INVA
INVB
INVI
STALLEN
FILTEN
reserved
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RW
RO
RO
Type
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Reset
Description
Reset
Type
Name
Bit/Field
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x000
RO
reserved
31:20
Input Filter Prescale Count
This field controls the frequency of the input update.
When this field is clear, the input is sampled after 2 system clocks. When
this field ix 0x1, the input is sampled after 3 system clocks. Similarly,
when this field is 0xF, the input is sampled after 17 clocks.
this field ix 0x1, the input is sampled after 3 system clocks. Similarly,
when this field is 0xF, the input is sampled after 17 clocks.
0x0
RW
FILTCNT
19:16
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0x0
RO
reserved
15:14
Enable Input Filter
Description
Value
The QEI inputs are not filtered.
0
Enables the digital noise filter on the QEI input signals. Inputs
must be stable for 3 consecutive clock edges before the edge
detector is updated.
must be stable for 3 consecutive clock edges before the edge
detector is updated.
1
0
RW
FILTEN
13
Stall QEI
Description
Value
The QEI module does not stall when the microcontroller is
stopped by a debugger.
stopped by a debugger.
0
The QEI module stalls when the microcontroller is stopped by
a debugger.
a debugger.
1
0
RW
STALLEN
12
2017
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller