Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Datenbogen
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Produktcode
DK-TM4C129X
Description
Reset
Type
Name
Bit/Field
Pad I/O Wake-Up Interrupt Mask
Description
Value
The
PADIOWK
interrupt is suppressed and not sent to the
interrupt controller.
0
An interrupt is sent to the interrupt controller when the
PADIOWK
bit in the HIBRIS register is set.
1
0
RW
PADIOWK
5
External Write Complete/Capable Interrupt Mask
Description
Value
The
WC
interrupt is suppressed and not sent to the interrupt
controller.
0
An interrupt is sent to the interrupt controller when the
WC
bit in
the HIBRIS register is set.
1
0
RW
WC
4
External Wake-Up Interrupt Mask
Description
Value
The
EXTW
interrupt is suppressed and not sent to the interrupt
controller.
0
An interrupt is sent to the interrupt controller when the
EXTW
bit
in the HIBRIS register is set.
1
0
RW
EXTW
3
Low Battery Voltage Interrupt Mask
Description
Value
The
LOWBAT
interrupt is suppressed and not sent to the interrupt
controller.
0
An interrupt is sent to the interrupt controller when the
LOWBAT
bit in the HIBRIS register is set.
1
0
RW
LOWBAT
2
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
0
RO
reserved
1
RTC Alert 0 Interrupt Mask
Description
Value
The
RTCALT0
interrupt is suppressed and not sent to the
interrupt controller.
0
An interrupt is sent to the interrupt controller when the
RTCALT0
bit in the HIBRIS register is set.
1
0
RW
RTCALT0
0
593
December 13, 2013
Texas Instruments-Advance Information
Tiva
™
TM4C129XNCZAD Microcontroller