Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Datenbogen

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DK-TM4C129X
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Table 9-1. μDMA Channel Assignments (continued)
8
7
6
5
4
3
2
1
0
Enc.
T
ype
Peripheral
T
ype
Peripheral
T
ype
Peripheral
T
ype
Peripheral
T
ype
Peripheral
T
ype
Peripheral
T
ype
Peripheral
T
ype
Peripheral
T
ype
Peripheral
Ch
#
-
Reserved
B
GPTimer
6B
-
Reserved
-
Reserved
SB
B
I2C2 TX
-
Reserved
SB
UART6
TX
SB
SSI1 TX
SB
SSI0 TX
11
-
Reserved
B
GPTimer
7A
-
Reserved
B
AES0 Cin
B
GPIO K
-
Reserved
SB
SSI2 RX
SB
UART2
RX
-
Reserved
12
-
Reserved
B
GPTimer
7B
-
Reserved
B
AES0
Cout
B
GPIO L
-
Reserved
SB
SSI2 TX
SB
UART2
TX
-
Reserved
13
-
Reserved
-
Reserved
-
Reserved
B
AES0 Din
B
GPIO M
B
GPIO E
SB
SSI3 RX
B
GPTimer
2A
SB
ADC0
SS0
14
-
Reserved
-
Reserved
-
Reserved
B
AES0
Dout
B
GPIO N
B
GPIO F
SB
SSI3 TX
B
GPTimer
2B
SB
ADC0
SS1
15
-
Reserved
-
Reserved
-
Reserved
-
Reserved
B
GPIO P
-
Reserved
SB
UART3
RX
-
Reserved
SB
ADC0
SS2
16
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
SB
UART3
TX
-
Reserved
SB
ADC0
SS3
17
-
Reserved
-
Reserved
-
Reserved
-
Reserved
SB
B
I2C3 RX
B
GPIO B
SB
UART4
RX
B
GPTimer
1A
B
GPTimer
0A
18
-
Reserved
-
Reserved
-
Reserved
-
Reserved
SB
B
I2C3 TX
B
GPIO G
SB
UART4
TX
B
GPTimer
1B
B
GPTimer
0B
19
-
Reserved
-
Reserved
-
Reserved
B
DES0
Cin
SB
B
I2C4 RX
B
GPIO H
SB
UART7
RX
B
EPI 0 RX
Software
B
GPTimer
1A
20
-
Reserved
-
Reserved
-
Reserved
B
DES0
Din
SB
B
I2C4 TX
B
GPIO J
SB
UART7
TX
B
EPI 0 TX
Software
B
GPTimer
1B
21
B
I2C8 RX
-
Reserved
-
Reserved
B
DES0
Dout
SB
B
I2C5 RX
B
Software
-
Reserved
B
Software
SB
UART1
RX
22
B
I2C8 TX
-
Reserved
-
Reserved
-
Reserved
SB
B
I2C5 TX
B
Software
-
Reserved
B
Software
SB
UART1
TX
23
B
I2C9 RX
-
Reserved
-
Reserved
-
Reserved
B
GPIO Q
-
Reserved
-
Reserved
SB
ADC1
SS0
SB
SSI1 RX
24
B
I2C9 TX
-
Reserved
-
Reserved
-
Reserved
B
GPIO R
-
Reserved
-
Reserved
SB
ADC1
SS1
SB
SSI1 TX
25
B
I2C6 RX
-
Reserved
-
Reserved
-
Reserved
B
GPIO S
-
Reserved
-
Reserved
SB
ADC1
SS2
B
Software
26
B
I2C6 TX
-
Reserved
B
GPIO T
-
Reserved
-
Reserved
-
Reserved
-
Reserved
SB
ADC1
SS3
B
Software
27
B
I2C7 RX
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
28
B
I2C7 TX
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
-
Reserved
29
B
1Wire0
B
EPI0 RX
-
Reserved
-
Reserved
-
Reserved
B
Software
-
Reserved
B
Software
B
Software
30
-
Reserved
B
EPI0 TX
-
Reserved
-
Reserved
-
Reserved
B
Reserved
-
Reserved
-
Reserved
-
Reserved
31
9.2.2
Priority
The μDMA controller assigns priority to each channel based on the channel number and the priority
level bit for the channel. Channel number 0 has the highest priority and as the channel number
increases, the priority of a channel decreases. Each channel has a priority level bit to provide two
December 13, 2013
710
Texas Instruments-Advance Information
Micro Direct Memory Access (μDMA)