Texas Instruments Development Kit for TM4C129x,Tiva™ ARM® Cortex™ -M4 Microcontroller DK-TM4C129X DK-TM4C129X Datenbogen
Produktcode
DK-TM4C129X
Figure 13-6. AES - F8 Mode
Input buffer
(plain/cipher text)
AES core
(encrypt)
Output buffer
(cipher/plain text)
Key register
128
128
256
data_in
data_out
Key in
Encryption/Decryption
Temporary register
128
128
128
AES data out
buffer
Zeroes
0
63
IV register
64
64
+
1
Counter
0
63
64
XTS Operation
Figure 13-7 on page 994 shows the XTS mode of operation for encryption and decryption. The input
to the cryptographic core is XORed with the IV; the output of the cryptographic core is XORed with
the same IV. For decryption, the cryptographic core operates in reverse, but the XOR operations
are the same.
to the cryptographic core is XORed with the IV; the output of the cryptographic core is XORed with
the same IV. For decryption, the cryptographic core operates in reverse, but the XOR operations
are the same.
Figure 13-7. AES - XTS Operation
Input buffer
(plain text)
AES core
(encrypt)
Output buffer
(cipher text)
Key register
128
128
256
data_in
data_out
Key in
Encryption
IV register
128
128
Temporary buffer
128
128
128
Input buffer
(cipher text)
AES core
(decrypt)
Output buffer
(plain text)
Key register
128
128
256
data_in
data_out
Key in
Decryption
IV register
128
128
Temporary buffer
128
128
128
December 13, 2013
994
Texas Instruments-Advance Information
Advance Encryption Standard Accelerator (AES)