Texas Instruments DM6467 Digital Video Evaluation Module TMDXEVM6467T TMDXEVM6467T Datenbogen
Produktcode
TMDXEVM6467T
SPRS605C – JULY 2009 – REVISED JUNE 2012
interrupt/event generation modes, multiplexed with other peripherals; 3 UART/IrDA/CIR interfaces with
modem interface signals on UART0; 2 pulse width modulator (PWM) peripherals; an ATA/ATAPI-6
interface; a 66-MHz peripheral component interface (PCI); and 2 external memory interfaces: an
asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed
synchronous memory interface for DDR2.
modem interface signals on UART0; 2 pulse width modulator (PWM) peripherals; an ATA/ATAPI-6
interface; a 66-MHz peripheral component interface (PCI); and 2 external memory interfaces: an
asynchronous external memory interface (EMIFA) for slower memories/peripherals, and a higher speed
synchronous memory interface for DDR2.
The Ethernet Media Access Controller (EMAC) provides an efficient interface between the DM6467T and
the network. The DM6467T EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps)
and 100 Mbps in either half- or full-duplex mode; and 1000Base-TX (1 Gbps) in full-duplex mode with
hardware flow control and quality of service (QOS) support.
the network. The DM6467T EMAC support both 10Base-T and 100Base-TX, or 10 Mbits/second (Mbps)
and 100 Mbps in either half- or full-duplex mode; and 1000Base-TX (1 Gbps) in full-duplex mode with
hardware flow control and quality of service (QOS) support.
The Management Data Input/Output (MDIO) module continuously polls all 32 MDIO addresses in order to
enumerate all PHY devices in the system. Once a PHY candidate has been selected by the ARM, the
MDIO module transparently monitors its link state by reading the PHY status register. Link change events
are stored in the MDIO module and can optionally interrupt the ARM, allowing the ARM to poll the link
status of the device without continuously performing costly MDIO accesses.
enumerate all PHY devices in the system. Once a PHY candidate has been selected by the ARM, the
MDIO module transparently monitors its link state by reading the PHY status register. Link change events
are stored in the MDIO module and can optionally interrupt the ARM, allowing the ARM to poll the link
status of the device without continuously performing costly MDIO accesses.
The PCI, HPI, I2C, SPI, USB2.0, and VLYNQ ports allow the DM6467T to easily control peripheral
devices and/or communicate with host processors.
devices and/or communicate with host processors.
The DM6467T also includes a High-Definition Video/Imaging Co-processor (HDVICP) and Video Data
Conversion Engine (VDCE) to offload many video and imaging processing tasks from the DSP core,
making more DSP MIPS available for common video and imaging algorithms. For more information on the
HDVICP enhanced codecs, such as H.264 and MPEG4, please contact your nearest TI sales
representative.
Conversion Engine (VDCE) to offload many video and imaging processing tasks from the DSP core,
making more DSP MIPS available for common video and imaging algorithms. For more information on the
HDVICP enhanced codecs, such as H.264 and MPEG4, please contact your nearest TI sales
representative.
The rich peripheral set provides the ability to control external peripheral devices and communicate with
external processors. For details on each of the peripherals, see the related sections later in this document
and the associated peripheral reference guides.
external processors. For details on each of the peripherals, see the related sections later in this document
and the associated peripheral reference guides.
The DM6467T has a complete set of development tools for both the ARM and DSP. These include C
compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™
debugger interface for visibility into source code execution.
compilers, a DSP assembly optimizer to simplify programming and scheduling, and a Windows™
debugger interface for visibility into source code execution.
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Digital Media System-on-Chip (DMSoC)
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