Texas Instruments CC2650DK Benutzerhandbuch
ROM
7.4
ROM
The ROM contains a serial bootloader with SPI and UART support (see
, Bootloader chapter),
as well as Driver Library and RF stack support. See , Memory Map chapter for details.
7.5
EEFUSE
TBD
7.6
FLASH
The flash memory is organized as a set of 4-KB blocks that can be individually erased. An individual 32-bit
word can be programmed to change bits from 1 to 0. In addition, a write buffer provides the ability to
program 32 continuous words in flash memory in half the time of programming the words individually.
Erasing a block causes the entire contents of the block to be reset to all 1s. The 4-KB blocks are paired
into sets of 8-KB blocks that can be individually protected. The protection allows blocks to be marked as
read-only or execute-only, thus providing different levels of code protection. Read-only blocks cannot be
erased or programmed, which protects the contents of those blocks from being modified. Execute-only
blocks cannot be erased or programmed and can only be read by the controller instruction fetch
mechanism, which protects the contents of those blocks from being read by either the controller or a
debugger.
word can be programmed to change bits from 1 to 0. In addition, a write buffer provides the ability to
program 32 continuous words in flash memory in half the time of programming the words individually.
Erasing a block causes the entire contents of the block to be reset to all 1s. The 4-KB blocks are paired
into sets of 8-KB blocks that can be individually protected. The protection allows blocks to be marked as
read-only or execute-only, thus providing different levels of code protection. Read-only blocks cannot be
erased or programmed, which protects the contents of those blocks from being modified. Execute-only
blocks cannot be erased or programmed and can only be read by the controller instruction fetch
mechanism, which protects the contents of those blocks from being read by either the controller or a
debugger.
The Flash block is mainly clocked by the 48-MHz system clock.
7.6.1 FLASH Memory Protection
The FLASH memory can be read/write protected in 4-kB sectors by configuring the CCFG.
7.6.2 Memory Programming
Memory programming is done using TI provided API. When calling the API functions, all interrupts should
be disabled to prevent any attempts to read the FLASH during the execution of these functions.
be disabled to prevent any attempts to read the FLASH during the execution of these functions.
Table 7-5. CC26xx Memory Write/Erase Protection
(1) (2) (3)
Memory area
FCFG0
FCFG1
Ti locked
Customer
CCFG
Customer free
CC26xx state
(Efuse)
(ENGR)
Sector
locked
Write 1s
Unpacked die
Free
Free
None
None
All
(no way back)
Packed die
Locked
Free
Free
None
None
All
Engineering sample
Locked
Free
Free
None
None
All
Customer
Except TI locked
Locked
Locked
Free
Fixed
None
development
sectors
Writable
Customer delivery
Can add locked
Locked
Locked
(Not
Fixed
May be reduced
(4)
case 1
sectors
(4)
erasable)
(4)
Customer delivery
Locked
Locked
Locked
(4)
Fixed
Fixed
(4)
Fixed
(4)
case 2
(1)
Locked: Not writable and not erasable
(2)
Free: Writable and erasable
(3)
Fixed: The number of this type is fixed
(4)
Chip Erase function will erase all sectors not locked by TI.
540
Versatile Instruction Memory System (VIMS)
SWCU117A – February 2015 – Revised March 2015
Copyright © 2015, Texas Instruments Incorporated