Texas Instruments SRC4382 Evaluation Module (EVM) and USB motherboard SRC4382EVM-PDK SRC4382EVM-PDK Datenbogen
Produktcode
SRC4382EVM-PDK
www.ti.com
2
0
-
2
-
4
-
6
-
8
-
10
-
12
-
14
-
16
-
18
-
20
10
0
10
1
10
2
10
3
Jitter Frequency (Hz)
10
4
10
5
10
6
JitterAttenuation(dB)
P
eakJitter(UI)
-
10
-
20
-
30
-
40
-
50
-
60
-
70
-
80
-
90
-
100
-
110
-
120
-
130
-
140
-
150
20
100
1k
Sinusoidal Jitter Frequency (Hz)
10k
100k
THD+NRatio(dB)
5
2
1
500m
200m
100m
50m
20m
10m
5m
2m
1m
THD+N
Output Jitter Amplitude
Input Jitter Amplitude
Ch 2
.
Ch. 1
Ch. 1
Ch 2
.
Ch 2
.
Ch. 1
Ch. 1
Ch 2
.
BLS
(output)
SY C
N
(output)
C or U da a
t
(output)
Bit 0
Bit 1
Bit 2
Bit 4
¼
Block Start
(Fr me
a
0 St rts He
a
re)
ASYNCHRONOUS SAMPLE RATE CONVERTER (SRC) OPERATION
SBFS030C – JANUARY 2006 – REVISED SEPTEMBER 2007
Figure 69. DIR Jitter Attenuation Characteristics
Figure 70. DIR Jitter Tolerance Plot
Figure 71. DIR Channel Status and User Data Serial Output Format Via the GPO Pins
The asynchronous SRC provides conversion from an arbitrary input sampling rate to a desired output sampling
rate. The input and output sampling rates may be equal or different, within the bounds of a 1:16 to 16:1
rate. The input and output sampling rates may be equal or different, within the bounds of a 1:16 to 16:1
32
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