Freescale Semiconductor 56F8367 Evaluation Module MC56F8367EVME MC56F8367EVME Datenbogen
Produktcode
MC56F8367EVME
Introduction
56F8367 Technical Data, Rev. 9
Freescale Semiconductor
15
Preliminary
Part 2 Signal/Connection Descriptions
2.1 Introduction
The input and output signals of the 56F8367 and 56F8167 are organized into functional groups, as detailed
in
in
and as illustrated in
Table 2-2
, each table row describes the signal or signals
present on a pin.
Table 2-1 Functional Group Pin Allocations
Functional Group
Number of Pins in Package
56F8367
56F8167
Power (V
DD
or V
DDA
)
9
9
Power Option Control
1
1
Ground (V
SS
or V
SSA
)
7
7
Supply Capacitors
1
& V
PP
1. If the on-chip regulator is disabled, the V
CAP
pins serve as 2.5V V
DD_CORE
power inputs
6
6
PLL and Clock
4
4
Address Bus
24
24
Data Bus
16
16
Bus Control
10
10
Interrupt and Program Control
6
6
Pulse Width Modulator (PWM) Ports
26
13
Serial Peripheral Interface (SPI) Port 0
4
4
Serial Peripheral Interface (SPI) Port 1
—
4
Quadrature Decoder Port 0
2
2. Alternately, can function as Quad Timer pins
4
4
Quadrature Decoder Port 1
3
3. Pins in this section can function as Quad Timer, SPI #1, or GPIO
4
—
Serial Communications Interface (SCI) Ports
2
4
4
CAN Ports
2
—
Analog to Digital Converter (ADC) Ports
21
21
Timer Module Ports
6
2
JTAG/Enhanced On-Chip Emulation (EOnCE)
5
5
Temperature Sense
1
—
Dedicated GPIO
—
7