Digi NS9750 Benutzerhandbuch

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I
When set, tells the 
TX_WR
 logic to set 
TXBUFC
 in the Ethernet Interrupt Status 
register (see page 385) when the buffer is closed due to a normal channel 
completion.
Buffer pointer
32-bit pointer to the start of the buffer in system memory. This pointer can be 
aligned on any byte of a 32-bit word.
Status
Lower 16 bits of the Ethernet Transmit Status register. The status is returned 
from the Ethernet MAC at the end of the frame and written into the last buffer 
descriptor of the frame. 
L
When set, tells the 
TX_WR
 logic that this buffer descriptor is the last descriptor 
that completes an entire frame. This bit allows multiple descriptors to be 
chained together to make up a frame.
F
When set, indicates the buffer is full. The 
TX_WR
 logic clears this bit after 
emptying a buffer. The system software sets this bit as required, to signal that 
the buffer is ready for transmission. If the 
TX_WR
 logic detects that this bit is 
not set when the buffer descriptor is read, it does one of two things:
 
If a frame is not in progress, the 
TX_WR
 logic sets the 
TXIDLE
 bit in the 
Ethernet Interrupt Status register.
 
If a frame is in progress, the 
TXBUFNR
 bit in the Ethernet Interrupt Status 
register is set.
In either case, the 
TX_WR
 logic stops processing frames until 
TCLER
 (clear 
transmit logic) in Ethernet General Control Register #2 is toggled from low to 
high.
TXBUFNR
 is set only for frames that consist of multiple buffer descriptors and 
contain a descriptor — not the first descriptor — that does not have the F bit set 
after frame transmission has begun.
Buffer length
This is a dual use field:
 
When the buffer descriptor is read from the TX buffer descriptor RAM, 
buffer length indicates the length of the buffer, in bytes. The 
TX_WR
 logic 
uses this information to identify the end of the buffer. For proper operation 
of the 
TX_WR
 logic, all transmit frames must be at least 34 bytes in length.
 
When the 
TX_WR
 logic updates the buffer descriptor at the end of the 
frame, it writes the length of the frame, in bytes, into this field for the last 
buffer descriptor of the frame. 
If the MAC is configured to add the CRC to the frame (that is, CRCEN in 
MAC Configuration Register #2 is set to 1), this field will include the four 
bytes of CRC. This field is set to 0x000 for jumbo frames that are aborted 
(see "TXAJ" on page 346)
Only the lower 11 bits of this field are valid, since the maximum legal frame size 
for Ethernet is 1522 bytes.
Field
Description