Benutzerhandbuch für Texas Instruments EVM430-F6736 - MSP430F6736 EVM for Metering EVM430-F6736

Inhaltsverzeichnis

• Features

  1
• Description

  2
  • Functional Block Diagram, MSP430F673xIPZ, MSP430F672xIPZ

    4
  • Functional Block Diagram, MSP430F673xIPN, MSP430F672xIPN

    4
  • Pin Designation, MSP430F673xIPZ

    5
  • Pin Designation, MSP430F673xIPN

    7
• Short-Form Description

  19
  • CPU

    19
  • Instruction Set

    19
  • Operating Modes

    20
  • Interrupt Vector Addresses

    21
  • Memory Organization

    22
  • Bootstrap Loader (BSL)

    24
  • JTAG Operation

    24
    • JTAG Standard Interface

      24
    • Spy-Bi-Wire Interface

      24
  • Flash Memory

    25
  • RAM Memory

    25
  • Backup RAM Memory

    25
  • Peripherals

    25
    • Oscillator and System Clock

      25
    • Power Management Module (PMM)

      26
    • Auxiliary Supply System

      26
    • Backup Subsystem

      26
    • Digital I/O

      26
    • Port Mapping Controller

      27
    • System Module (SYS)

      29
    • Watchdog Timer (WDT_A)

      29
    • DMA Controller

      30
    • CRC16

      31
    • Hardware Multiplier

      31
    • Enhanced Universal Serial Communication Interface (eUSCI)

      31
    • ADC10_A

      31
    • SD24_B

      31
    • TA0

      32
    • TA1

      32
    • TA2

      33
    • TA3

      33
    • SD24_B Triggers

      34
    • ADC10_A Triggers

      34
    • Real-Time Clock (RTC_C)

      34
    • REF Voltage Reference

      34
    • LCD_C

      34
    • Embedded Emulation Module (EEM) (S Version)

      34
    • Peripheral File Map

      35
• Absolute Maximum Ratings

  47
• Recommended Operating Conditions

  47
• Active Mode Supply Current Into VCC Excluding External Current

  48
• Low-Power Mode Supply Currents (Into VCC) Excluding External Current

  49
• Low-Power Mode With LCD Supply Currents (Into VCC) Excluding External Current

  50
• Schmitt-Trigger Inputs – General Purpose I/O

  50
• Inputs – Ports P1 and P2

  51
• Leakage Current – General Purpose I/O

  51
• Outputs – General Purpose I/O (Full Drive Strength)

  51
• Typical Characteristics – General Purpose I/O (Full Drive Strength)

  52
• Outputs – General Purpose I/O (Reduced Drive Strength)

  53
• Typical Characteristics – General Purpose I/O (Reduced Drive Strength)

  54
• Output Frequency – General Purpose I/O

  55
• Crystal Oscillator, XT1, Low-Frequency Mode

  55
• Internal Very-Low-Power Low-Frequency Oscillator (VLO)

  56
• Internal Reference, Low-Frequency Oscillator (REFO)

  56
• DCO Frequency

  57
• PMM, Brown-Out Reset (BOR)

  58
• PMM, Core Voltage

  58
• PMM, SVS High Side

  58
• PMM, SVM High Side

  59
• PMM, SVS Low Side

  60
• PMM, SVM Low Side

  60
• Wake-Up from Low-Power Modes and Reset

  60
• Auxiliary Supplies - Recommended Operating Conditions

  61
• Auxiliary Supplies - AUX3 (Backup-Sub-System) Currents

  61
• Auxiliary Supplies - Auxiliary Supply Monitor

  61
• Auxiliary Supplies - Switch On-Resistance

  62
• Auxiliary Supplies - Switching Time

  63
• Auxiliary Supplies - Switch Leakage

  63
• Auxiliary Supplies - Auxiliary Supplies to ADC10_A

  63
• Auxiliary Supplies - Charge Limiting Resistor

  63
• Timer_A

  64
• eUSCI (UART Mode) - Recommended Operating Conditions

  64
• eUSCI (UART Mode)

  64
• eUSCI (SPI Master Mode) - Recommended Operating Conditions

  64
• eUSCI (SPI Master Mode)

  64
• eUSCI (SPI Slave Mode)

  67
• eUSCI (I2C Mode)

  69
• LCD_C - Recommended Operating Conditions

  69
• LCD_C Electrical Characteristics

  70
• SD24_B, Power Supply and Recommended Operating Conditions

  71
• SD24_B, Analog Input

  71
• SD24_B, Supply Currents

  72
• SD24_B, Performance

  72
• SD24_B, AC Performance

  75
• SD24_B, AC Performance

  75
• SD24_B, AC Performance

  76
• SD24_B, External Reference Input

  77
• 10-Bit ADC, Power Supply and Input Range Conditions

  77
• 10-Bit ADC, Timing Parameters

  78
• 10-Bit ADC, Linearity Parameters

  79
• 10-Bit ADC, External Reference

  79
• REF, Built-In Reference

  80
• Flash Memory

  81
• JTAG and Spy-Bi-Wire Interface

  81
• Input/Output Schematics

  82
  • Port P1, P1.0 and P1.1, Input/Output With Schmitt Trigger (MSP430F67xxIPZ and MSP430F67xxIPN)

    82
  • Port P1, P1.2, Input/Output With Schmitt Trigger (MSP430F67xxIPZ and MSP430F67xxIPN)

    83
  • Port P1, P1.3 to P1.5, Input/Output With Schmitt Trigger (MSP430F67xxIPZ and MSP430F67xxIPN)

    84
  • Port P1, P1.6 and P1.7 (MSP430F67xxIPZ and MSP430F67xxIPN), Port P2, P2.0 and P2.1 (MSP430F67xxIPZ Only) Input/Output With Schmitt Trigger

    85
  • Port P2, P2.2 to P2.7, Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    87
  • Port P3, P3.0 to P3.3, Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    89
  • Port P3, P3.4 to P3.7 , Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    90
  • Port P4, Port P5, Port P6, Port P7, Port P8, P8.0 to P8.3 Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    91
  • Port P8, P8.4 to P8.7, Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    97
  • Port P9, P9.0, Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    98
  • Port P9, P9.1 to P9.3, Input/Output With Schmitt Trigger (MSP430F67xxIPZ Only)

    99
  • Port P2, P2.0 and P2.1, Input/Output With Schmitt Trigger (MSP430F67xxIPN Only)

    100
  • Port P2, P2.2 to P2.7 , Input/Output With Schmitt Trigger (MSP430F67xxIPN Only)

    102
  • Port P3, P3.0 to P3.7 , Input/Output With Schmitt Trigger (MSP430F67xxIPN Only)

    104
  • Port P4, Port P5, Port P6, Input/Output With Schmitt Trigger (MSP430F67xxIPN Only)

    106
  • Port J, J.0, JTAG pin TDO, Input/Output With Schmitt Trigger or Output

    110
  • Port J, J.1 to J.3, JTAG pins TMS, TCK, TDI/TCLK, Input/Output With Schmitt Trigger or Output

    110
• Device Descriptors (TLV)

  112
• Revision History

  114