Motorola 24-Bit Digital Signal Processor User Manual
MOTOROLA INC., 1995
MOTOROLA
TECHNICAL DATA
SEMICONDUCTOR
This document, containing changes, additional features, further explanations, and clarifications, is
a supplement to the original document:
a supplement to the original document:
Change the following:
Page 11-4, Section 11.2.1 - Delete “4. NeXT
Page 11-4, Section 11.2.1 - Delete “4. NeXT
TM
under Mach”.
Page A-83, third line - Replace
“1;leN;le24”
with
“1
≤
N
≤
24”
Page A-104, Under the “Operation:” heading - Replace “
D -1
⇒
D
” with “
D+1
⇒
D
”.
Page A-104, Second sentence after “Description:” heading - Replace “
One is added from the LSB
of D.
” with “
One is added to the LSB of D; i.e. bit 0 of A0 or B0.
”
Page A-130, First symbolic description under the “Operation:” heading - Replace “
If S[n]=0
” with
“
If S[n]=1
”.
Page A-218, Timing description - Replace “
Timing:
2+mvp oscillator clock cycles
” with “
Timing:
6 + ea + ap oscillator clock cycles
”.
Page A-219, Timing description - Replace “
Timing:
2+mvp oscillator clock cycles
” with “
Timing:
6 + ea + ap oscillator clock cycles
”.
Page A-225, Timing description - Replace “
Timing:
4+mvp oscillator clock cycles
” with “
Timing:
2+mvp oscillator clock cycles
”.
Page A-261, Timing description - Replace “
Timing:
4 oscillator clock cycles
” with “
Timing:
2+mvp
oscillator clock cycles
”.
Page A-261, Memory description - Replace
“Memory:
1 program words
” with
“Memory:
1+ mv
program words
”.
Page B-11, An inch below the middle of the page - Replace the “
cir
” instruction with “
clr
”.
Page B-16, 7
th
instruction from bottom - Replace “
lsl A,n0
” with “
lsl B A,n0
”.
DSP56KFAMUM/AD
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DSP56K Family
24-bit Digital Signal Processors
24-bit Digital Signal Processors
Addendum to
24-bit Digital Signal Processor
Family Manual
Family Manual
DSP56K Family
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