Renesas rl78 User Manual

 

RL78/G1A 

 

CHAPTER  3   CPU  ARCHITECTURE 

R01UH0305EJ0200  Rev.2.00 

 

 

80  

Jul 04, 2013 

 

Table indirect addressing specifies a table address in the CALLT table area (0080H to 00BFH) with the 5-bit 

immediate data in the instruction word, stores the contents at that table address and the next address in the program 

counter (PC) as 16-bit data, and specifies the program address.  Table indirect addressing is applied only for CALLT 

instructions.   

In the RL78 microcontrollers, branching is enabled only to the 64 KB space from 00000H to 0FFFFH.   

 

 

Low Addr.

High Addr.

0

0000

OP code

00000000

10

Table address

PC

S

PC

PC

H

PC

L

Memory