Renesas rl78 User Manual

Page of 1004
 
RL78/G1A 
 
CHAPTER  6   TIMER  ARRAY  UNIT 
R01UH0305EJ0200  Rev.2.00 
 
 
196  
Jul 04, 2013 
6.3  Registers Controlling Timer Array Unit 
 
Timer array unit is controlled by the following registers.
 
 
• Peripheral enable register 0 (PER0) 
• Timer clock select register m (TPSm) 
• Timer mode register mn (TMRmn) 
• Timer status register mn (TSRmn) 
• Timer channel enable status register m (TEm) 
• Timer channel start register m (TSm) 
• Timer channel stop register m (TTm) 
• Timer input select register 0 (TIS0) 
• Timer output enable register m (TOEm) 
• Timer output register m (TOm) 
• Timer output level register m (TOLm) 
• Timer output mode register m (TOMm) 
• Input switch control register (ISC) 
• Noise filter enable registers 1 (NFEN1) 
• Port mode control register (PMCxx) 
• Port mode register (PMxx) 
• Port register (Pxx) 
 
Caution  Which registers and bits are included depends on the product.  Be sure to set bits that are not 
mounted to their initial values.
 
 
Remark  m: Unit number (m = 0), n: Channel number (n = 0 to 7)