Renesas rl78 User Manual

Page of 1004
 
RL78/G1A 
CHAPTER  10   WATCHDOG  TIMER 
10.3  Register Controlling Watchdog Timer  
 
The watchdog timer is controlled by the watchdog timer enable register (WDTE). 
 
10.3.1  Watchdog timer enable register (WDTE) 
Writing “ACH” to the WDTE register clears the watchdog timer counter and starts counting again. 
This register can be set by an 8-bit memory manipulation instruction. 
Reset signal generation sets this register to 9AH or 1AH
Note
 
Figure 10-2.  Format of Watchdog Timer Enable Register (WDTE) 
 
0
1
2
3
4
5
6
7
Symbol
WDTE
Address:  FFFABH     After reset:  9AH/1AH
Note
     R/W
 
 
Note  The WDTE register reset value differs depending on the WDTON bit setting value of the option byte 
(000C0H).  To operate watchdog timer, set the WDTON bit to 1. 
 
WDTON Bit Setting Value 
WDTE Register Reset Value 
0 (watchdog timer count operation disabled) 
1AH 
1 (watchdog timer count operation enabled) 
9AH 
 
Cautions 1.  If a value other than “ACH” is written to the WDTE register, an internal reset signal is 
generated. 
 
2.  If a 1-bit memory manipulation instruction is executed for the WDTE register, an internal reset 
signal is generated. 
 
3.  The value read from the WDTE register is 9AH/1AH (this differs from the written value (ACH)). 
R01UH0305EJ0200  Rev.2.00 
 
 
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Jul 04, 2013