Renesas rl78 User Manual
RL78/G1A
CHAPTER 1 OUTLINE
1.6 Outline of Functions
(1/2)
Jul 04, 2013
25-pin 32-pin 48-pin 64-pin
Item
R5F10E8x R5F10EBx R5F10EGx R5F10ELx
Code flash memory (KB)
16 to 64
16 to 64
16 to 64
32 to 64
Data flash memory (KB)
4
4
4
4
RAM (KB)
2 to 4
Note1
Note1
Note1
Note1
2 to 4
2 to 4
2 to 4
Address space
1 MB
High-speed system
clock
clock
X1 (crystal/ceramic) oscillation, external main system clock input (EXCLK)
1 to 20 MHz: V
1 to 20 MHz: V
DD
= 2.7 to 3.6 V, 1 to 8 MHz: V
DD
= 1.8 to 2.7 V, 1 to 4 MHz: V
DD
= 1.6 to 1.8 V
Main system
clock
clock
High-speed on-chip
oscillator
oscillator
HS (High-speed main) mode : 1 to 32 MHz (V
DD
= 2.7 to 3.6 V),
HS (High-speed main) mode : 1 to 16 MHz (V
DD
= 2.4 to 3.6 V),
LS (Low-speed main) mode
: 1 to 8 MHz (V
DD
= 1.8 to 3.6 V),
LV (Low-voltage main) mode : 1 to 4 MHz (V
DD
= 1.6 to 3.6 V)
−
Subsystem clock
XT1 (crystal) oscillation, external subsystem
clock input (EXCLKS) 32.768 kHz (TYP.)
clock input (EXCLKS) 32.768 kHz (TYP.)
Low-speed on-chip oscillator
15 kHz (TYP.)
(8-bit register
× 8) × 4 bank
General-purpose register
0.03125
μs (High-speed on-chip oscillator: f
IH
= 32 MHz operation)
Minimum instruction execution time
0.05
μs (High-speed system clock: f
MX
= 20 MHz operation)
30.5
μs (Subsystem clock: f
SUB
= 32.768 kHz
operation)
−
• Data transfer (8/16 bits)
• Adder and subtractor/logical operation (8/16 bits)
• Multiplication (8 bits × 8 bits)
• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.
• Adder and subtractor/logical operation (8/16 bits)
• Multiplication (8 bits × 8 bits)
• Rotate, barrel shift, and bit manipulation (Set, reset, test, and Boolean operation), etc.
Instruction set
Total
19 26 42 56
I/O port
CMOS I/O
14
(N-ch O.D. I/O [V
DD
withstand voltage]: 6)
20
(N-ch O.D. I/O [V
DD
withstand voltage]: 9)
32
(N-ch O.D. I/O [V
DD
withstand voltage]: 11)
46
(N-ch O.D. I/O [V
DD
withstand voltage]: 12)
<R>
CMOS
input
3 3 5 5
−
−
CMOS output
1 1
N-ch open-drain I/O
(6 V tolerance)
(6 V tolerance)
2 3 4 4
16-bit timer
8 channels
Timer
Watchdog timer
1 channel
Note 2
Real-time clock (RTC)
1 channel
1 channel
12-bit interval timer (IT)
1 channel
Note 3
Timer output
2 channels (PWM outputs: 1
)
4 channels
(PWM outputs: 3
(PWM outputs: 3
7 channels
(PWM outputs: 6
(PWM outputs: 6
Note 3
Note 3
)
)
−
RTC output
1
• 1 Hz (subsystem clock: f
• 1 Hz (subsystem clock: f
SUB
= 32.768 kHz)
Notes 1. In the case of the 4 KB, this is about 3 KB when the self-programming function and data flash function are
used. (For details, see CHAPTER 3)
2. Only the constant-period interrupt function when the low-speed on-chip oscillator clock (f
IL
) is selected.
<R>
3. The number of PWM outputs varies depending on the setting of channels in use (the number of masters
and slaves). (6.9.3 Operation as multiple PWM output function).
R01UH0305EJ0200 Rev.2.00
17