Renesas rl78 User Manual
RL78/G1A
CHAPTER 13 SERIAL INTERFACE IICA
13.5.5 Stop condition
When the SCLA0 pin is at high level, changing the SDAA0 pin from low level to high level generates a stop condition.
A stop condition is a signal that the master device generates to the slave device when serial transfer has been
completed. When the device is used as a slave, stop conditions can be detected.
Figure 13-19. Stop Condition
SCLA0
SDAA0
H
A stop condition is generated when bit 0 (SPT0) of IICA control register 00 (IICCTL00) is set to 1. When the stop
condition is detected, bit 0 (SPD0) of the IICA status register 0 (IICS0) is set to 1 and INTIICA0 is generated when bit 4
(SPIE0) of the IICCTL00 register is set to 1.
R01UH0305EJ0200 Rev.2.00
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Jul 04, 2013