Renesas rl78 User Manual

Page of 1004
 
RL78/G1A 
CHAPTER  19   RESET  FUNCTION  
Remark  f
IH
High-speed on-chip oscillator clock 
 
f
X
X1 oscillation clock 
 
f
EX
:  External main system clock 
 
f
XT
: XT1 
oscillation 
clock 
 
f
EXS
:  External subsystem clock 
 
f
IL
Low-speed on-chip oscillator clock 
 
Table 19-2.  State of Hardware After Receiving a Reset Signal 
Hardware After 
Reset 
Acknowledgment
Note
 
Program counter (PC) 
The contents of the 
reset vector table 
(0000H, 0001H) are set.
Stack pointer (SP) 
Undefined 
Program status word (PSW) 
06H 
Data memory 
Undefined 
RAM 
General-purpose registers 
Undefined 
Note  During reset signal generation or oscillation stabilization time wait, only the PC contents among the hardware 
statuses become undefined.  All other hardware statuses remain unchanged after reset. 
 
Remark  For the state of the special function register (SFR) after receiving a reset signal, see 3.1.4  Special function 
egister (SFR) area and 3.1.5  Extended special function register (2nd SFR: 2nd Special Function 
Register) area
  
R01UH0305EJ0200  Rev.2.00 
 
 
745  
Jul 04, 2013