Renesas rl78 User Manual
RL78/G1A
CHAPTER 24 OPTION BYTE
24.2 Format of User Option Byte
The format of user option byte is shown below.
Figure 24-1. Format of User Option Byte (000C0H/010C0H)
Address: 000C0H/010C0H
Note 1
7 6 5 4 3 2 1 0
WDTINIT
WINDOW1
WINDOW0
WDTON WDCS2 WDCS1 WDCS0
WDSTBYON
WDTINIT
Use of interval interrupt of watchdog timer
0
Interval interrupt is not used.
1
Interval interrupt is generated when 75% + 1/2f
IL
of the overflow time is reached.
WINDOW1
WINDOW0
Watchdog timer window open period
Note 2
0 0
Setting
prohibited
0 1
50%
1 0
75%
1 1
100%
WDTON
Operation
control
of watchdog timer counter
0
Counter operation disabled (counting stopped after reset)
1
Counter operation enabled (counting started after reset)
WDCS2 WDCS1 WDCS0
Watchdog timer overflow time
(f
IL
= 17.25 kHz (MAX.))
0 0 0
2
6
/f
IL
(3.71 ms)
0 0 1
2
7
/f
IL
(7.42 ms)
0 1 0
2
8
/f
IL
(14.84 ms)
0 1 1
2
9
/f
IL
(29.68 ms)
1 0 0
2
11
/f
IL
(118.72 ms)
1 0 1
2
13
/f
IL
(474.89 ms)
1 1 0
2
14
/f
IL
(949.79 ms)
1 1 1
2
16
/f
IL
(3799.18 ms)
WDSTBYON
Operation control of watchdog timer counter (HALT/STOP mode)
0
Counter operation stopped in HALT/STOP mode
Note 2
1
Counter operation enabled in HALT/STOP mode
Notes 1. Set the same value as 000C0H to 010C0H when the boot swap operation is used because 000C0H is
replaced by 010C0H.
2. The window open period is 100% when WDSTBYON = 0, regardless the value of the WINDOW1 and
WINDOW0 bits.
Remark f
IL
: Low-speed on-chip oscillator clock frequency
R01UH0305EJ0200 Rev.2.00
794
Jul 04, 2013