Renesas rl78 User Manual
RL78/G1A
CHAPTER 29 ELECTRICAL SPECIFICATIONS (T
A
=
−40 to +85°C)
R01UH0305EJ0200 Rev.2.00
894
Jul 04, 2013
(2) I
2
C fast mode, fast mode plus
(T
A
=
−40 to +85°C, 1.6 V ≤ EV
DD0
≤ V
DD
≤ 3.6 V, V
SS
= EV
SS0
= 0 V)
Fast Mode
Note 7
Fast Mode
Plus
Note 8
HS
Note 2
LS
Note 3
LV
Note 4
HS
Note 2
Parameter Symbol
Conditions
MIN.
MAX.
MIN.
MIN.
MAX. MIN. MAX. MIN.
Unit
2.7 V
≤ EV
DD0
≤
3.6
V
0 400
0 400
0 400 0 1000
SCLA0 clock frequency f
SCL
1.8 V
≤ EV
DD0
≤
3.6
V
0 400
0 400
0 400
−
kHz
2.7 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
0.26
Setup time of restart
condition
t
SU:STA
1.8 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
−
μs
2.7 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
0.26
Hold time
Note 5
t
HD:STA
1.8 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
−
μs
2.7 V
≤ EV
DD0
≤ 3.6 V
1.3
1.3
1.3
0.5
Hold time when SCLA0
= “L”
t
LOW
1.8 V
≤ EV
DD0
≤ 3.6 V
1.3
1.3
1.3
−
μs
2.7 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
0.26
Hold time when SCLA0
= “H”
t
HIGH
1.8 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
−
μs
2.7 V
≤ EV
DD0
≤ 3.6 V
100
100
100
50
Data setup time
(reception)
t
SU:DAT
1.8 V
≤ EV
DD0
≤ 3.6 V
100
100
100
−
ns
2.7 V
≤ EV
DD0
≤
3.6
V
0 0.9 0 0.9 0 0.9 0 450
Data hold time
(transmission)
Note 6
t
HD:DAT
1.8 V
≤ EV
DD0
≤
3.6
V
0 0.9 0 0.9 0 0.9
−
μs
2.7 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
0.26
Setup time of stop
condition
t
SU:STO
1.8 V
≤ EV
DD0
≤ 3.6 V
0.6
0.6
0.6
−
μs
2.7 V
≤ EV
DD0
≤ 3.6 V
1.3
1.3
1.3
0.5
Bus-free time
t
BUF
1.8 V
≤ EV
DD0
≤ 3.6 V
1.3
1.3
1.3
−
μs
Notes 1. In normal mode, use it with f
CLK
≥ 1 MHz, 1.6 V ≤ EV
DD
≤ 3.6 V.
2. HS is condition of HS (high-speed main) mode.
3. LS is condition of LS (low-speed main) mode.
4. LV is condition of LV (low-voltage main) mode.
5. The first clock pulse is generated after this period when the start/restart condition is detected.
5. The first clock pulse is generated after this period when the start/restart condition is detected.
6. The maximum value (MAX.) of t
HD:DAT
is during normal transfer and a wait state is inserted in the ACK
(acknowledge) timing.
7. In fast mode, use it with f
CLK
≥ 3.5 MHz, 1.8 V ≤ EV
DD
≤ 3.6 V.
8. In fast mode plus, use it with f
CLK
≥ 10 MHz, 2.7 V ≤ EV
DD
≤ 3.6 V.
Remark The maximum value of C
b
(communication line capacitance) and the value of R
b
(communication line pull-up
resistor) at that time in each mode are as follows.
Standard mode: C
b
= 400 pF, R
b
= 2.7 k
Ω
Fast mode:
C
b
= 320 pF, R
b
= 1.1 k
Ω
Fast mode plus: C
b
= 120 pF, R
b
= 1.1 k
Ω