Renesas rl78 User Manual
RL78/G1A
CHAPTER 30 ELECTRICAL SPECIFICATIONS (G: INDUSTRIAL APPLICATIONS T
A
=
−40 to +105°C)
R01UH0305EJ0200 Rev.2.00
943
Jul 04, 2013
30.5.2 Serial interface IICA
(1) I
2
C standard mode, fast mode
(T
A
=
−40 to +105°C, 2.4 V ≤ EV
DD0
≤ V
DD
≤ 3.6 V, V
SS
= EV
SS0
= 0 V)
Standard
Mode
Fast Mode
Parameter Symbol
Conditions
MIN. MAX. MIN. MAX.
Unit
Fast mode: f
CLK
≥ 3.5 MHz
2.4 V
≤ EV
DD0
≤ 3.6 V
0
400
kHz
SCLA0 clock frequency
f
SCL
Normal mode: f
CLK
≥ 1 MHz
2.4 V
≤ EV
DD0
≤ 3.6 V
0
100
kHz
Setup time of restart condition
t
SU:STA
4.7 0.6
μs
Hold time
Note 1
t
HD:STA
4.0 0.6
μs
Hold time when SCLA0 = “L”
t
LOW
4.7 1.3
μs
Hold time when SCLA0 = “H”
t
HIGH
4.0 0.6
μs
Data setup time (reception)
t
SU:DAT
250 100 ns
Data hold time (transmission)
Note 2
t
HD:DAT
0 3.45 0 0.9
μs
Setup time of stop condition
t
SU:STO
4.0 0.6
μs
Bus-free time
t
BUF
4.7 1.3
μs
Notes 1. The first clock pulse is generated after this period when the start/restart condition is detected.
2. The maximum value (MAX.) of t
HD:DAT
is during normal transfer and a wait state is inserted in the ACK
(acknowledge) timing.
Remark The maximum value of C
b
(communication line capacitance) and the value of R
b
(communication line pull-up
resistor) at that time in each mode are as follows.
Standard mode: C
b
= 400 pF, R
b
= 2.7 k
Ω
Fast mode:
C
b
= 320 pF, R
b
= 1.1 k
Ω
IICA serial transfer timing
t
LOW
t
HIGH
t
HD
:
STA
t
BUF
Stop
condition
condition
Start
condition
condition
Restart
condition
condition
Stop
condition
condition
t
SU
:
DAT
t
SU
:
STA
t
SU
:
STO
t
HD
:
STA
t
HD
:
DAT
SCL0
SDA0