Fujitsu FR81S User Manual
FUJITSU SEMICONDUCTOR LIMITED
CONTENTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
CONTENTS
CHAPTER 1: OVERVIEW ....................................................................................................................... 1
1.
O
VERVIEW
...................................................................................................................................... 2
2.
F
EATURES
....................................................................................................................................... 3
2.1.
FR81S CPU Core .............................................................................................................. 4
2.2.
Peripheral Functions .......................................................................................................... 5
3.
P
RODUCT
L
INE
-
UP
........................................................................................................................... 8
4.
F
UNCTION OVERVIEW
..................................................................................................................... 20
5.
B
LOCK
D
IAGRAM
........................................................................................................................... 24
6.
M
EMORY
M
AP
............................................................................................................................... 30
7.
P
IN
A
SSIGNMENT
........................................................................................................................... 32
8.
D
EVICE
P
ACKAGE
.......................................................................................................................... 38
9.
E
XPLANATION OF
P
IN
F
UNCTIONS
................................................................................................... 45
9.1.
Pins of Each Function ...................................................................................................... 56
9.1.1.
Pins of A/D converter (ch.0 to ch.47) ...................................................................................................... 57
9.1.2.
Pins of CAN (ch.0 to ch.2) ........................................................................................................................ 59
9.1.3.
Pins of D/A converter (ch.0 to ch.1) ........................................................................................................ 60
9.1.4.
Pins of External interrupt input................................................................................................................. 61
9.1.5.
Pins of Multi-function serial interface (ch.0 to ch.11) ............................................................................ 62
9.1.6.
Pins of PPG (ch.0 to ch.47) ...................................................................................................................... 64
9.1.7.
Pin of RTC .................................................................................................................................................. 67
9.1.8.
Pins of Up/down counter .......................................................................................................................... 68
9.1.9.
Pins of Output compare (ch.0 to ch.5: 16bit, ch.6 to ch.11: 32bit) ...................................................... 69
9.1.10.
Pins of Input capture (ch.0 to ch.3: 16bit, ch.4 to ch.9: 32bit) ............................................................. 70
9.1.11.
Pins of Free-run timer (ch.0 to ch.2: 16bit, ch.3 to ch.5: 32bit) ........................................................... 71
9.1.12.
Pins of Base timer (ch.0, ch.1)................................................................................................................. 72
9.1.13.
Pins of Reload timer (ch.0 to ch.7) .......................................................................................................... 73
9.1.14.
Pins of External Bus interface .................................................................................................................. 74
9.1.15.
Pins of Waveform generator (ch.0 to ch.5) ............................................................................................ 76
9.1.16.
Pin of Clock monitor .................................................................................................................................. 77
9.1.17.
Pins of Port Function (General-Purpose I/O) ......................................................................................... 78
9.1.18.
Other Pins ................................................................................................................................................... 82
10.
I/O
C
IRCUIT
T
YPES
........................................................................................................................ 83
CHAPTER 2: HANDLING THE DEVICE .............................................................................................. 87
1.
H
ANDLING
P
RECAUTIONS
............................................................................................................... 88
2.
H
ANDLING
D
EVICE
......................................................................................................................... 92
3.
A
PPLICATION
N
OTES
...................................................................................................................... 95
3.1.
Function Switching of a Multiplexed Port ......................................................................... 96
3.2.
Low-power Consumption Mode ....................................................................................... 97
3.3.
Notes When Writing Data in a Register Having the Status Flag ...................................... 98
CHAPTER 3: CPU ................................................................................................................................ 99
1.
O
VERVIEW
.................................................................................................................................. 100
2.
F
EATURES
................................................................................................................................... 101
3.
CPU
O
PERATING
D
ESCRIPTION
.................................................................................................... 103
3.1.
CPU Operating Status ................................................................................................... 104
3.1.1.
Reset State ............................................................................................................................................... 105
3.1.2.
Normal Run State .................................................................................................................................... 106
3.1.3.
Low-power Consumption State .............................................................................................................. 107
3.1.4.
Debug Run State ..................................................................................................................................... 108
4.
P
IPELINE
O
PERATION
................................................................................................................... 109
5.
F
LOATING
P
OINT
O
PERATION
P
ROCESSING
.................................................................................... 110
6.
D
ATA
S
TRUCTURE
......................................................................................................................... 111
7.
A
DDRESSING
................................................................................................................................ 112
8.
P
ROGRAMMING
M
ODEL
................................................................................................................. 113
8.1.
General-purpose Registers, Dedicated Registers, and Floating Point Registers .......... 114
MB91520 Series
MN705-00010-1v0-E
(9)