Fujitsu FR81S User Manual
CHAPTER 30: POWER CONSUMPTION CONTROL
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : POWER CONSUMPTION CONTROL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
7
4. Registers
This section shows the registers of the power consumption control.
Table 4-1 Register Map
Address
Registers
Register function
+0
+1
+2
+3
0x0480
Reserved
Reserved
STBCR
Reserved
Standby control register
0x0590
Reserved
PMUCTLR PWRTMCTL
Reserved
PMU control register
PoWeR on TiMing control register
0x0594
PMUINTF0
PMUINTF1
PMUINTF2
Reserved
PMU interrupt flag register 0 to 2
Note:
The addresses 0x0480 to 0x0481 and 0x0590 are allocated for the register "RESET". (See "CHAPTER:
RESET".)
The group of registers (except STBCR) is initialized only in accordance with one or some of the following
factors:
1. Power-on reset
2. Internal low-voltage detection
3. Simultaneous assert of RSTX and NMIX external pins
4. Hardware watchdog reset
* Registers are not initialized by reset of the INIT level and RST level. (except for STBCR)
MB91520 Series
MN705-00010-1v0-E
1094