Fujitsu FR81S User Manual
CHAPTER 30: POWER CONSUMPTION CONTROL
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : POWER CONSUMPTION CONTROL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
13
4.5. PMU Interrupt Flag Register 1 : PMUINTF1 (Power
Management Unit INTerrupt Flag1 register)
The bit configurations of the PMU interrupt flag register 1 are shown below.
This register indicates the interrupt request by external input at shutdown.
PMUINTF1 : Address 0595
H
(Access: Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
EIF7
EIF6
EIF5
EIF4
EIF3
EIF2
EIF1
EIF0
Initial value
0
0
0
0
0
0
0
0
Attribute R(RM1),
W
R(RM1),
W
R(RM1),
W
R(RM1),
W
R(RM1),
W
R(RM1),
W
R(RM1),
W
R(RM1),
W
This register will be initialized by power-on reset, internal low-voltage reset, reset by simultaneous assert of
RSTX and NMIX, and hardware watchdog timer reset.
[bit7 to bit0] EIF7 to EIF0 (External Interrupt Flag7 to 0)
These flags indicate the interrupt request by external input at shutdown.
EIFxx
External interrupt request
0
No request
1
Request
xx -> The number from 7 to 0 is assigned.
These registers are enabled only at shutdown.
These registers are cleared by writing "0". Writing "1" is invalid.
MB91520 Series
MN705-00010-1v0-E
1100