Fujitsu FR81S User Manual
CHAPTER 30: POWER CONSUMPTION CONTROL
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : POWER CONSUMPTION CONTROL
FUJITSU SEMICONDUCTOR CONFIDENTIAL
11
4.3. PoWeR on TiMing Control Register : PWRTMCTL
(PoWeR on TiMing ConTroL register)
The bit configurations of the PoWeR on TiMing control register are shown below.
This register controls timing for power-on.
PWRTMCTL : Address 0592
H
(Access: Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
PTC[2:0]
Initial value
0
0
0
0
0
0
1
1
Attribute R0,W0 R0,W0 R0,W0 R0,W0 R0,W0
R/W
R/W
R/W
This register will be initialized by power-on reset, internal low-voltage reset, reset by simultaneous assert of
RSTX and NMIX, and hardware watchdog timer reset.
[bit7 to bit3] Reserved
The read value is always "0". Be sure to write these bits to "0".
[bit2 to bit0] PTC (Power on Timing Cycle setting)
These bits set the rising time for PSW.
PTC[2:0]
Rising time
Remarks (PMUCLK=32kHz)
000
3
×
(1/PMUCLK)
90μS
001
9
×
(1/PMUCLK)
270μS
010
15
×
(1/PMUCLK)
450μS
011
27
×
(1/PMUCLK)
810μS
100
Prohibit
-
101
6
×
(1/PMUCLK)
180μS
110
12
×
(1/PMUCLK)
360μS
111
21
×
(1/PMUCLK)
630μS
MB91520 Series
MN705-00010-1v0-E
1098