Fujitsu FR81S User Manual
CHAPTER 34: CLOCK SUPERVISOR
4. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CLOCK SUPERVISOR
FUJITSU SEMICONDUCTOR CONFIDENTIAL
12
4.3. Re-enabling the Clock Supervisor
This section explains re-enabling the clock supervisor.
Main Clock Supervisor
To re-enable the main clock supervisor function, set the MSVE bit of the CSVCR register to "1".
The thing to permit the main clock supervisor function with the CR oscillator has stopped is prohibited.
[Notes]
Because the main oscillation stabilization wait time is measured by the main clock itself, if the main clock
stops before the oscillation stabilization wait time has elapsed, the main oscillation stabilization wait time
does not end and the main clock supervisor is not enabled.
In this case, after the timeout time measured by the internal CR oscillator has elapsed, the main supervisor
function is enabled regardless of the oscillation stabilization wait time and the main clock stop is detected.
Sub Clock Supervisor
To permit the sub clock supervisor function again, the SSVE bit of the CSVCR register is set to "1". The
thing to permit the sub clock supervisor function with the CR oscillator has stopped is prohibited.
MB91520 Series
MN705-00010-1v0-E
1185