Fujitsu FR81S User Manual
CHAPTER 36: EXTERNAL BUS INTERFACE
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : EXTERNAL BUS INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
8
[bit31 to bit16] SADR[31:16] (Start ADdRess) : CS Area Start Address
SADR specifies the start address of the CS area. The initial value for ASR0 is "0000_0000_0000_0000",
and for not ASR0 is undefined. The start address sets the upper 16 bits of the 32-bit address. The CS area is
the area starting from the address specified in these registers with a range as specified by ASZ[3:0]. The CS
area boundary is determined according to the setting of bits 7 to 4:ASZ[3:0] of these registers. For example,
when the CS area is configured as 1Mbyte using ASZ[3:0]=0100, bit[19:16] of SADR are ignored and only
SADR[31:20] has meaning.
Note:
The address range that can be allocated to the CS area depends on the model. See "APPENDIX".
[bit15 to bit8] Reserved
Always write "0" to these bits.
[bit7 to bit4] ASZ[3:0] (Area SiZe) : CS Area Size
These bits configure the size of the CS area as follows. These bits also specify the bit position within SADR
that is actually compared to the address.
ASZ[3:0]
CS area size
SADR bits that are actually compared to the
address
0000
64Kbyte
SADR[31:16]
0001
128Kbyte
SADR[31:17]
0010
256Kbyte
SADR[31:18]
0011
512Kbyte
SADR[31:19]
0100
1Mbyte
SADR[31:20]
0101
2Mbyte
SADR[31:21]
0110
4Mbyte
SADR[31:22]
0111
8Mbyte
SADR[31:23]
1000
16Mbyte
SADR[31:24]
1001
32Mbyte
SADR[31:25]
1010
64Mbyte
SADR[31:26]
1011
128Mbyte
SADR[31:27]
1100
256Mbyte
SADR[31:28]
1101
512Mbyte
SADR[31:29]
1110
1Gbyte
SADR[31:30]
1111
2Gbyte (Initial value)
SADR[31]
[bit3] Reserved
Always write "0" to this bit.
MB91520 Series
MN705-00010-1v0-E
1207