Fujitsu FR81S User Manual
CHAPTER 3: CPU
3. CPU Operating Description
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : CPU
FUJITSU SEMICONDUCTOR CONFIDENTIAL
11
3.1.4. Debug Run State
The debug run state is shown below.
The debug run state is the state when the CPU is connected to ICE and debug related functions are enabled.
The debug run state has two states: a user state and a debug state. The transition between the debug run state
and other states is basically carried via the reset state. However, the transition from the normal run state to
the debug run state forcefully is also enabled.
The user state has a privilege mode and a user mode as the normal run state. However, when a break for
debugging is carried out, the state changes to the debug state. In the debug state, instructions are executed in
a privilege mode and all registers and memory can be accessed under the state when the memory protection
function, etc. is disabled. The transition from a debug state to a user state is carried by the RETI instruction.
MB91520 Series
MN705-00010-1v0-E
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