Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
7. Operation of LIN Interface (v2.1)
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
281
From Synch Field Transmission to ID Field Transmission
⋅
When the first bit of the Synch Field (0x55) is transmitted, the SSR:TDRE (transmission data empty) bit
is set to "1". If the transmission interrupt is enabled (SCR:TIE=1) at this time, a transmission interrupt
occurs.
⋅
When this interrupt occurs, the ID Field can be written to the transmit data register (TDR).
⋅
When a reception interrupt occurs, the received data will be compared with the transmitted data to
confirm that no error has occurred.
⋅
The ID Field is output in an LSB-first fashion with a data length of 8 bits.
Figure 7-28 From Synch Field Transmission to ID Field Transmission
LIN bus
ST 0 1 2 3 4 5 6 7 SP ST 0 1 2 3 4 5 6 7 SP
ID Field
Synch Field
ID Field write
SSR:TDRE
Synch Break
delimiter
delimiter
SSR:RDRF
MB91520 Series
MN705-00010-1v0-E
1594