Fujitsu FR81S User Manual

Page of 2342
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE 
 
 
8. Operation of I2C 
 
FUJITSU SEMICONDUCTOR LIMITED 
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE 
FUJITSU SEMICONDUCTOR CONFIDENTIAL 
377 
Figure 8-57 Example of I
2
C Flowchart (FIFO Memory Not Used)   
(When DMA mode is enable (SSR:DMA=1)) 1/4 
 
Start
Initial setting>
Baud rate setting(BGR)
Slave address(ISBA)
Slave Mask setting(ISMK)
Enabled I2C(ISMK:EN=1)
Master ?
SSR:TBI=1?
Transmission data writing(TDR)
Master setting(IBCR:MSS=1)
IBCR:INT=1?
NFCR:BEC=0で
IBCR:BER=0?
IBCR:AL=0?
IBCR:RSA=0?
A
Bus error processing
End
Slave
Reserved address
IBSR:FBT=0?
Reception data reading(RDR)
Reception complete
Wait setting(IBCR:WSEL=1)
ACK setting(IBCR:ACKE=1)
Writing of dummy data(TDR)
Wait setting(IBCR:WSEL)
ACK setting(IBCR:ACKE=0)
Repetition start ?
Writing of Transmission 
data(TDR)
Repetition start setting 
(IBCR:MSS=SCC=1)
ACK setting(IBCR:ACKE)
Clearing interrupt 
flag(IBCR:INT=0)
Stop setting(IBCR:MSS=0)
ACK setting(IBCR:ACKE)
Clearing interrupt 
flag(IBCR:INT=0)
エンド
Yes
No
Yes
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
IBSR:RACK=0?
IBCR:MSS=1?
IBCR:TRX=1?
送信完了
?
Writing of Transmission 
data(TDR)
Wait setting(IBCR:WSEL)
ACK setting(IBCR:ACKE)
Clearing interrupt 
flag(IBCR:INT=0)
Yes
Yes
Yes
No
No
No
B
No
Yes
Master(TBI interrupt)
Arbitration lost processing
 
 
 
End 
Transmission 
complete? 
Arbitration lost processing 
End 
MB91520 Series
MN705-00010-1v0-E
1690