Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
8. Operation of I2C
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
378
Figure 8-58 Example of I
2
C Flowchart (FIFO Memory Not Used)
(When DMA mode is enable (SSR:DMA=1)) 2/4
Master(TBI interrupt)
IBCR:TRX=1?
Transmission
complete ?
Yes
No
A
No
Yes
Reception data reading(RDR)
Reception complete ?
Wait setting(IBCR:WSEL=1)
ACK setting(IBCR:ACKE=1)
Writing of dummy data(TDR)
ACK setting(IBCR:ACKE=1)
Writing of dummy data(TDR)
No
Transmission data write(TDR)
Wait setting(IBCR:WSEL)
ACK setting(IBCR:ACKE)
Wait setting(IBCR:WSEL)
ACK setting(IBCR:ACKE)
A
Repetition start ?
Transmission data write(TDR)
Repetition start
setting(IBCR:MSS=SCC=1)
ACK setting(IBCR:ACKE)
Interrupt flag setting
clear(IBCR:INT=0)
Repetition start
setting(IBCR:MSS=SCC=1)
ACK setting(IBCR:ACKE)
Interrupt flag setting
clear(IBCR:INT=0)
End
No
Yes
Stop setting(IBCR:MSS=0)
ACK setting(IBCR:ACKE)
Interrupt flag setting
clear(IBCR:INT=0)
ACK setting(IBCR:ACKE)
Interrupt flag setting
clear(IBCR:INT=0)
Interrupt flag setting
(IBCR:INT)
(IBCR:INT)
IBCR:INT=1?
Error processing
End
A
Yes
No
Master data reception
Master data transmission
Yes
MB91520 Series
MN705-00010-1v0-E
1691