Fujitsu FR81S User Manual
CHAPTER 40: MULTI-FUNCTION SERIAL INTERFACE
8. Operation of I2C
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : MULTI-FUNCTION SERIAL INTERFACE
FUJITSU SEMICONDUCTOR CONFIDENTIAL
380
Figure 8-60 Example of I
2
C Flowchart (FIFO Memory Not Used)
(When DMA mode is enable (SSR:DMA=1)) 4/4
Reserved address
IBSR:FBT=1 ?
Multi Master ?
Reception data reading(RDR)
Wait setting(IBCR:WSEL=1)
ACK setting(IBCR:ACKE=1)
Clearing interrupt flag(IBCR:INT=0)
A
Yes
Reception data reading(RDR)
Wait setting(IBCR:WSEL)
ACK setting(IBCR:ACKE=1)
Clearing interrupt flag(IBCR:INT=0)
No
No
Yes
IBSR:TRX=1 ?
SSR:RDRF=1 ?
Reception data reading(RDR)
Transmission data reading(TDR)
Wait setting(IBCR:WSEL)
ACK setting(IBCR:ACKE=0)
Clearing interrupt flag(IBCR:INT=0)
IBSR:RACK=0 ?
B
A
Wait setting(IBCR:WSEL=1)
ACK setting(IBCR:ACKE=1)
Clearing interrupt flag(IBCR:INT=0)
Transmission complete ?
Reception Complete ?
Reception data reading(RDR)
Yes
Yes
Yes
Yes
No
No
No
No
A
Yes(NACK response)
Wait setting(IBCR:WSEL)
ACK setting(IBCR:ACKE=0)
No
Note:
Flow is flow that shows the operation setting outline by the I
2
C mode. It is necessary to do processing that
considers error processing etc. to the application.
MB91520 Series
MN705-00010-1v0-E
1693