Fujitsu FR81S User Manual
CHAPTER 44: 12-BIT A/D CONVERTER
5. Operation
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER
: 12-BIT A/D CONVERTER
FUJITSU SEMICONDUCTOR CONFIDENTIAL
68
5.1.1. A/D conversion completion interrupt
The A/D conversion completion interrupt is explained.
Table 5-1 Interrupt control bit and interrupt factor by A/D conversion completion interrupt
A/D conversion completion interrupt
Interrupt request flag bit
INT:bit14 of A/D activation trigger control status register
(ADTCS)
Interrupt request enable bit
INTE:bit13 of A/D activation trigger control status register
(ADTCS)
Interrupt factor
Writing of A/D conversion result in A/D data register
The A/D conversion completion interrupt request can be generated when the A/D conversion of compare
channel that activates the A/D converter completions. Moreover, the A/D conversion completion interrupt
can be controlled with each activation channel.
When the A/D conversion result is set in A/D data register (ADTCD), the INT bit of A/D activation trigger
control status register (ADTCS) is set in "1". At this time, when the interrupt request enable bit has been
enabled (ADTCS.INTE="1"), the interrupt request is output to the interrupt controller.
MB91520 Series
MN705-00010-1v0-E
1871