Fujitsu FR81S User Manual
CHAPTER 46: WORKFLASH MEMORY
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : WORKFLASH MEMORY
FUJITSU SEMICONDUCTOR CONFIDENTIAL
9
4.1. WorkFlash Control Register : DFCTLR (WorkFlash
ConTroL Register)
The bit configuration of the WorkFlash control register is shown below.
This register configures the access control to the WorkFlash.
DFCTLR: Address 2300
H
(Access : Byte, Half-word, Word)
bit15
bit14
bit13
bit12
bit11
bit10
bit9
bit8
Reserved
FWE
Reserved
Initial value
-
0
-
-
-
-
-
-
Attribute RX,WX
R/W
RX,WX
RX,WX
RX,WX
RX,WX
RX,WX
RX,WX
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
Initial value
-
-
-
-
-
-
-
-
Attribute RX,WX
RX,WX
RX,WX
RX,WX
RX,WX
RX,WX
RX,WX
RX,WX
[bit15] Reserved
This bit is reserved. The read value is undefined. Writing has no effect on the operation.
[bit14] FWE (Flash Write Enable) : Flash write enable
This bit is a control bit to enable write to the WorkFlash in the CPU mode.
If this bit is set, the ECC error detection and data correcting function will be disabled for data fetching to
the WorkFlash memory.
FWE
Description
0
Flash write disabled (Initial value)
1
Flash write enabled
[bit13 to bit0] Reserved
These bits are reserved. The read value is undefined. Writing has no effect on the operation
MB91520 Series
MN705-00010-1v0-E
1980