Fujitsu FR81S User Manual
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
2
A. I/O Map
IO map is shown.
The following I/O map shows the relationship between memory space and registers for peripheral resources.
Figure A-1 Legend of I/O Map
The initial register value after reset indicates as follows:
⋅
"1": Initial value "1"
⋅
"0": Initial value "0"
⋅
"X": Initial value undefined
⋅
"-": Reserved bit/Undefined bit
⋅
"*": Initial value "0" or "1" according to the setting
Note:
It is prohibited to access addresses not described here.
000090
H
BT1TMR[R] H
0000000000000000
BT1TMCR[R/W]B,H,W
00000000 00000000
000094
H
BT1STC[R/W] B
00000000
000098
H
BT1PCSR/BT1PRLL[R /W] H
0000000000000000
BT1PDU T/BT1PRLH/BT1D TBF[R/W] H
0000000000000000
00009C
H
BTSEL[R /W] B
----0000
BTSSSR[W] B,H
-------- ------11
0000A0
H
ADERH [R/W]B, H, W
00000000 00000000
ADER L [R/W]B, H, W
00000000 00000000
0000A4
H
ADCS1 [R/W] B, H,W
00000000
ADCS0 [R/W] B, H,W
00000000
ADCR1 [R] B, H,W
------XX
ADCR 0 [R] B, H,W
XXXXX XXX
0000A8
H
ADCT1 [R/W] B, H,W
00010000
ADCT0 [R/W] B, H,W
00101100
ADSCH [R/W] B, H,W
---00000
ADECH [R/W] B, H,W
---00000
+0
+1
+2
+3
Read/Write attribute (R: Read W: Write)
Data access attribute
B: Byte
H: Half-word
W: Word
(Note)
Initial register value after reset
Address
Address offset value/ register name
Block
Base timer 1
A/D converter
The access by the data access attribute
not described is disabled.
MB91520 Series
MN705-00010-1v0-E
2212