Fujitsu FR81S User Manual
APPENDIX
A. I/O Map
FUJITSU SEMICONDUCTOR LIMITED
APPENDIX
FUJITSU SEMICONDUCTOR CONFIDENTIAL
3
Table A-1 : I/O Map
Address
Address offset value / Register name
Block
+0
+1
+2
+3
000000
H
PDR00 [R/W] B,H,W
XXXXXXXX
PDR01 [R/W] B,H,W
XXXXXXXX
PDR02 [R/W] B,H,W
XXXXXXXX
PDR03 [R/W] B,H,W
XXXXXXXX
Port Data Register
000004
H
PDR04 [R/W] B,H,W
XXXXXXXX
PDR05 [R/W] B,H,W
XXXXXXXX
PDR06 [R/W] B,H,W
XXXXXXXX
PDR07 [R/W] B,H,W
XXXXXXXX
000008
H
PDR08 [R/W] B,H,W
XXXXXXXX
PDR09 [R/W] B,H,W
XXXXXXXX
PDR10 [R/W] B,H,W
XXXXXXXX
PDR11 [R/W] B,H,W
XXXXXXXX
00000C
H
PDR12 [R/W] B,H,W
XXXXXXXX
PDR13 [R/W] B,H,W
-XXXXXXX
PDR14 [R/W] B,H,W
---XXX--
PDR15 [R/W] B,H,W
--XXXXXX
000010
H
―
―
―
―
000014
H
―
―
―
―
000018
H
PDR16 [R/W] B,H,W
XXXXXXXX
PDR17 [R/W] B,H,W
XXXXXXXX
PDR18 [R/W] B,H,W
XXXXXXXX
PDR19 [R/W] B,H,W
XXXXXXXX
00001C
H
to
000034
H
―
―
―
―
Reserved
000038
H
WDTECR0 [R/W]
B,H,W
---00000
―
―
―
Watchdog Timer
[S]
00003C
H
WDTCR0 [R/W]
B,H,W
-0--0000
WDTCPR0 [W]
B,H,W
00000000
WDTCR1 [R]
B,H,W
----0110
WDTCPR1 [W]
B,H,W
00000000
000040
H
―
―
―
―
Reserved
000044
H
DICR [R/W] B
-------0
―
―
―
Delayed Interrupt
000048
H
to
00005C
H
―
―
―
―
Reserved
000060
H
TMRLRA0 [R/W] H
XXXXXXXX XXXXXXXX
TMR0 [R] H
XXXXXXXX XXXXXXXX
Reload Timer 0
000064
H
TMRLRB0 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR0 [R/W] B,H,W
00000000 0-000000
000068
H
TMRLRA7 [R/W] H
XXXXXXXX XXXXXXXX
TMR7 [R] H
XXXXXXXX XXXXXXXX
Reload Timer 7
00006C
H
TMRLRB7 [R/W] H
XXXXXXXX XXXXXXXX
TMCSR7 [R/W] B,H,W
00000000 0-000000
000070
H
―
FRS8 [R/W] B,H,W
--00--00 --00--00 --00--00
Free-run timer
selection register 8
000074
H
―
FRS9 [R/W] B,H,W
--00--00 --00--00 --00--00
Free-run timer
selection register 9
000078
H
―
―
―
OCLS67 [R/W]
B,H,W
----0000
OCU67 Output
level control
register
MB91520 Series
MN705-00010-1v0-E
2213