Fujitsu FR81S User Manual
FUJITSU SEMICONDUCTOR LIMITED
CONTENTS
FUJITSU SEMICONDUCTOR CONFIDENTIAL
2.
F
EATURES
................................................................................................................................... 959
3.
C
ONFIGURATION
D
IAGRAM
........................................................................................................... 960
4.
R
EGISTERS
................................................................................................................................. 961
4.1.
16-bit Output Compare Registers .................................................................................. 962
4.1.1.
Output Compare Buffer Registers (OCCPB0 to OCCPB5)/Output Compare Registers (OCCP0 to
OCCP5)..................................................................................................................................................... 963
4.1.2.
Compare Control Register (OCS) ......................................................................................................... 967
4.1.3.
Compare Mode Control Register (OCMOD) ........................................................................................ 973
5.
O
PERATION
................................................................................................................................. 975
5.1.
Interrupts for 16-bit Output Compare ............................................................................. 976
5.2.
Operation of 16-bit Output Compare ............................................................................. 977
5.2.1.
Operation of 16-bit Output Compare (Inverted Mode, MOD0= 0 in OCMOD01 Register) ............ 978
5.2.2.
Operation of 16-bit Output Compare (Set/Reset Mode, MOD0 = 1 in OCMOD01 Register) ........ 981
5.2.3.
16-bit Output Compare Timing ............................................................................................................... 982
5.2.4.
Operation of 16-bit Output Compare and Free-run Timer .................................................................. 983
5.3.
Notes on Using 16-bit Output Compare......................................................................... 990
CHAPTER 26:16-BIT INPUT CAPTURE ............................................................................................ 991
1.
O
VERVIEW
.................................................................................................................................. 992
2.
F
EATURES
................................................................................................................................... 993
3.
C
ONFIGURATION
.......................................................................................................................... 994
4.
R
EGISTERS
................................................................................................................................. 995
4.1.
16-bit Input Capture Registers ....................................................................................... 996
4.1.1.
Input Capture Data Register : IPCP0 to IPCP3 ................................................................................... 997
4.1.2.
Input Capture State Control Register : ICS .......................................................................................... 998
4.1.3.
LIN SYNCH FIELD Switching Register : LSYNS .............................................................................. 1001
5.
O
PERATION
............................................................................................................................... 1002
5.1.
Interrupts for 16-bit Input Capture ................................................................................ 1003
5.2.
Operation of 16-bit Input Capture ................................................................................ 1004
5.2.1.
Operation of 16-bit Input Capture ........................................................................................................ 1005
5.2.2.
16-bit Input Capture Input Timing ........................................................................................................ 1006
5.3.
Notes on Using the 16-bit Input Capture ..................................................................... 1007
CHAPTER 27: UP/DOWN COUNTER .............................................................................................. 1009
1.
O
VERVIEW
................................................................................................................................ 1010
2.
F
EATURES
.................................................................................................................................. 1011
3.
C
ONFIGURATION
........................................................................................................................ 1013
4.
R
EGISTERS
............................................................................................................................... 1015
4.1.
Reload Compare Register (RCR0, RCR1) .................................................................. 1016
4.2.
Up/Down Count Register (UDCR0, UDCR1) ............................................................... 1017
4.3.
Counter Control Register (CCR0, CCR1) .................................................................... 1018
4.4.
Counter Status Register (CSR0, CSR1) ...................................................................... 1023
5.
I
NTERRUPT
................................................................................................................................ 1026
6.
O
PERATION AND
S
ETTING
P
ROCEDURE
E
XAMPLES
...................................................................... 1028
6.1.
Operation in Timer Mode ............................................................................................. 1032
6.2.
Operation in Up/down Count Mode ............................................................................. 1034
6.3.
Operation in the Phase Difference Count Mode (Multiply-by-Two) ............................. 1037
6.4.
Operation in the Phase Difference Count Mode (Multiply-by-Four) ............................ 1039
CHAPTER 28: REAL-TIME CLOCK(RTC) ....................................................................................... 1041
1.
O
VERVIEW
................................................................................................................................ 1042
2.
F
EATURES
................................................................................................................................. 1043
3.
C
ONFIGURATION
........................................................................................................................ 1044
4.
R
EGISTERS
............................................................................................................................... 1045
4.1.
RTC Control Register : WTCR ..................................................................................... 1046
4.2.
Sub-second Register : WTBR ...................................................................................... 1050
4.3.
Day/Hour/Minute/Second Register : WTDR/ WTHR/ WTMR/ WTSR ................. 1052
5.
O
PERATION
............................................................................................................................... 1054
6.
S
ETTING
.................................................................................................................................... 1056
MB91520 Series
MN705-00010-1v0-E
(22)