Fujitsu FR81S User Manual
CHAPTER 1: OVERVIEW
2. Features
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : OVERVIEW
FUJITSU SEMICONDUCTOR CONFIDENTIAL
6
2.2. Peripheral Functions
Peripheral functions is shown.
Clock generation (equipped with SSCG function)
Main oscillation (4MHz to 16MHz)
Sub oscillation (32kHz to 100kHz ) or no sub oscillation
PLL multiplication rate : 1 to 20 times
Built-in Program flash capacity
MB91F522 : 256 + 64KB
MB91F523 : 384 + 64KB
MB91F524 : 512 + 64KB
MB91F525 : 768 + 64KB
MB91F526 : 1024 + 64KB
Built-in Data flash (WorkFlash) 64KB
Built-in RAM capacity
Main RAM
MB91F522 : 48KB
MB91F523 : 48KB
MB91F524 : 64KB
MB91F525 : 96KB
MB91F526 : 128KB
BackupRAM 8KB
General-purpose ports :
MB91F52xB :
44(none sub oscillation), 42 (with sub oscillation)
MB91F52xD :
56(none sub oscillation), 54 (with sub oscillation)
MB91F52xF :
76(none sub oscillation), 74 (with sub oscillation)
MB91F52xJ :
96(none sub oscillation), 94 (with sub oscillation)
MB91F52xK :
120(none sub oscillation), 114 (with sub oscillation)
MB91F52xL :
152(none sub oscillation), 150 (with sub oscillation)
Included I
2
C pseudo open drain ports : 16
External bus interface
22-bit address, 16-bit data
DMA Controller
Up to 16 channels can be started simultaneously.
2 transfer factors ( Internal peripheral request and software )
A/D converter (successive approximation type)
12-bit resolution : Max. 48 channels (32 channels +16 channels)
Conversion time : 1μs
D/A converter (R-2R type)
8-bit resolution : 2 channels
External interrupt input: 8 channels × 2 unit Total:16 channels
Level ("H" / "L"), or edge detection ( rising or falling ) supported
MB91520 Series
MN705-00010-1v0-E
5