Fujitsu FR81S User Manual
CHAPTER 16: INTERRUPT REQUEST BATCH READ
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : INTERRUPT REQUEST BATCH READ
FUJITSU SEMICONDUCTOR CONFIDENTIAL
19
4.12. Interrupt Request Batch Read Register 6 lower-order :
IRPR6L (Interrupt Request Peripheral Read register
6L)
6L)
The bit configuration of the interrupt request batch read register 6 lower-order is explained.
This register indicates the peripheral that has issued the interrupt request. (Interrupt vector number #46)
IRPR6L : Address 0425
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
MTIR
STIR
PTIR
TXIR8
Reserved
Initial value
0
0
0
0
0
0
0
0
Attribute R,WX
R,WX
R,WX
R,WX
R0,WX
R0,WX
R0,WX
R0,WX
[bit7] MTIR (Main Timer Interrupt Request) : Main Timer Interrupt Request
[bit6] STIR (Sub Timer Interrupt Request) : Sub Timer Interrupt Request
[bit5] PTIR (PLL Timer Interrupt Request) : PLL Timer Interrupt Request
[bit4] TXIR8 (multifunction serial TX Interrupt Request 8) : Multifunction Serial interface ch.8
Transmission Completion Interrupt Request
Read value of each bit
Meaning
0
No interrupt request has been issued.
1
An interrupt request has been issued.
MB91520 Series
MN705-00010-1v0-E
522