Fujitsu FR81S User Manual
CHAPTER 16: INTERRUPT REQUEST BATCH READ
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : INTERRUPT REQUEST BATCH READ
FUJITSU SEMICONDUCTOR CONFIDENTIAL
21
4.14. Interrupt Request Batch Read Register 7 lower-order :
IRPR7L (Interrupt Request Peripheral Read register
7L)
7L)
The bit configuration of the interrupt request batch read register 7 lower-order is explained.
This register indicates the peripheral that has issued the interrupt request. (Interrupt vector number #49)
IRPR7L : Address 0427
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved
CRIR
TXIR9
Initial value
0
0
0
0
0
0
0
0
Attribute R0,WX R0,WX R0,WX
R0,WX
R0,WX
R0,WX
R,WX
R,WX
[bit1] CRIR (CR clock calibration Interrupt Request) : Clock Calibration (CR) Interrupt Request
[bit0] TXIR9 (multifunction serial TX Interrupt Request 9) : Multi-function Serial Interface ch.9
Transmission Completion Interrupt Request
Read value of each bit
Meaning
0
No interrupt request has been issued.
1
An interrupt request has been issued.
MB91520 Series
MN705-00010-1v0-E
524