Fujitsu FR81S User Manual
CHAPTER 16: INTERRUPT REQUEST BATCH READ
4. Registers
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : INTERRUPT REQUEST BATCH READ
FUJITSU SEMICONDUCTOR CONFIDENTIAL
25
4.18. Interrupt Request Batch Read Register 9 lower-order :
IRPR9L (Interrupt Request Peripheral Read register
9L)
9L)
The bit configuration of the interrupt request batch read register 9 lower-order is explained.
This register indicates the peripheral that has issued the interrupt request. (Interrupt vector number #53)
IRPR9L : Address 042B
H
(Access : Byte, Half-word, Word)
bit7
bit6
bit5
bit4
bit3
bit2
bit1
bit0
Reserved ICUIR7
Reserved
Initial value
0
0
0
0
0
0
0
0
Attribute R0,WX
R,WX
R0,WX R0,WX
R0,WX
R0,WX
R0,WX
R0,WX
[bit6] ICUIR7 (ICU Interrupt Request 7) : Input Capture ch.7 Interrupt Request
Read value of each bit
Meaning
0
No interrupt request has been issued.
1
An interrupt request has been issued.
MB91520 Series
MN705-00010-1v0-E
528