Fujitsu FR81S User Manual

CHAPTER 1: OVERVIEW

4. Function overview

FUJITSU SEMICONDUCTOR LIMITED

CHAPTER : OVERVIEW

FUJITSU SEMICONDUCTOR CONFIDENTIAL

Function

Features

External low-voltage detection

reset

Reset/interrupt generation at external low-voltage detection

When an external power-supply voltage falls below the detection voltage value,

reset/interrupt is generated.

The detecting voltage (2.8 V to 4.3 V) is possible to select 11 types.

Internal low-voltage detection

reset

Reset generation at internal low-voltage detection

Monitors 1.2V power supply and generates the reset.

Low-power consumption mode

Sleep mode

Stop mode

Watch mode

Stop mode (power shutdown)

Watch mode (power shutdown)

Sub RUN Mode

I/O relocation

Relocation target peripheral function and number of branches are shown below.

A/D converter external trigger

2 channels× Max. 2 divergences

CAN

(Max. 2 divergences for ch.0, Max. 2 divergences for ch.1)

External interrupt

(Max. 2 divergences for ch.1 to ch.4, ch.7, ch.9, ch.13, ch.14)

Multi-function serial

(Max. 2 divergences for ch.0 to ch.2, ch.10;

Max. 3 divergences for ch.3 and ch.4)

Serial chip select input (Max. 2 divergences for ch.1, ch.3, ch.4, ch10)

PPG

(Max. 2 divergences for ch.0 to ch.5, ch.16, ch.17, ch.23 to ch.41,

ch.43, ch.44)

U/D counter

2 channels× 3 divergences

Output compare

(Max. 2 divergences for ch.6 to ch.11)

Input capture

(Max. 4 divergences for ch.0 to ch.3;

Max. 3 divergences for ch.4;

Max. 2 divergences for ch.5 to ch.9)

Free-run timer

(Max. 2 divergences for ch.1, ch.3, ch.4, ch.5)

Base timer

2 channels× 2 divergences

Reload timer

(Max. 3 divergences for ch.0, ch.1, ch.3;

Max. 2 divergences for ch.2, ch.4, ch.5, ch.6, ch.7)

Wave Generator

(Max. 2 divergences for ch.0 to ch.5;

Max. 3 divergences for DTTI input)

NMI request

Non-maskable interrupt signal that is entered from NMIX pin.

Debug interface

Built-in OCD

MB91520 Series

MN705-00010-1v0-E