Fujitsu FR81S User Manual
CHAPTER 1: OVERVIEW
4. Function overview
FUJITSU SEMICONDUCTOR LIMITED
CHAPTER : OVERVIEW
FUJITSU SEMICONDUCTOR CONFIDENTIAL
22
Function
Features
Input capture
16-bit/32-bit capture registers to detect a rising edge, a falling edge, or both edges.
When an edge of pin input is detected, the counter value of free-run timer is latched and an
interrupt request is generated.
Cooperation with the free-run timer is as follows.
Input capture ch.0 to ch.3 : 16-bit → Free-run timer ch.0 to ch.2
Input capture ch.4 to ch.9 : 32-bit → Free-run timer ch.3 to ch.5
Cooperation with LIN synch break/synch field is as follows.
Input capture ch.0 → Multi-function serial ch.0
Input capture ch.1 → Multi-function serial ch.1
Input capture ch.2 → Multi-function serial ch.2
Input capture ch.3 → Multi-function serial ch.3
Input capture ch.4 → Multi-function serial ch.4
Input capture ch.5 → Multi-function serial ch.5
Input capture ch.6 → Multi-function serial ch.6
Input capture ch.7 → Multi-function serial ch.7
Input capture ch.8 → Multi-function serial ch.8, ch.9
Input capture ch.9 → Multi-function serial ch.10, ch.11
Built-in cycle/pulse width measurement function (only 32-bit supported)
Output compare
A
n interrupt signal is output during collating with the 16-bit/32-bit free-run timer.
Cooperation with the free-run timer is as follows.
Output compare ch.0 to ch.5 : 16-bit → Free-run timer ch.0 to ch.2
Output compare ch.6 to ch.11 : 32-bit → Free-run timer ch.3 to ch.5
Built-in compare level control function (only 32-bit supported)
16-bit output compare has no dedicated output pins.
There is only the output through the wave generator.
Reload timer
16-bit reload timer operation (The toggle output or one-shot output can be selected)
Event count function can be selected.
Real-time clock
Day/hours/minutes/seconds register
Main or sub oscillation frequency can be selected for the operation clock.
Sub clock correction function
- The sub clock cycle error is monitored by the main clock.
- The detected error is reflected on the second counter set value.
An interrupt can be generated in unit of 0.5 second, seconds, minutes, hours, or day.
Calibration
The real-time clock of the sub clock drive is corrected by comparison with the main clock.
PPG
The cycle and duty used for the one-shot square wave output and PWM output can be
changed by the software.
Operation clock frequency :
Can be selected from following 4 types : PCLK × 1, 1/2
2
, 1/2
4
, 1/2
6
StratDelay of each channel can be set.
It is possible to use it as activation trigger of A/D.
The cycle of the High format and the Low format and duty can be set.
Delay interrupt
An interrupt for task switching is generated.
The CPU interrupt request can be generated or canceled by the software.
External interrupt
16 channel, independent
Interrupt factor : rising edge / falling edge / "L" level / "H" level can be selected.
Support of edge input detection when returned to standby state.
MB91520 Series
MN705-00010-1v0-E
21